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author | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2016-03-03 17:36:41 +0300 |
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committer | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2016-03-03 20:24:57 +0300 |
commit | 3f177625ee896f5d3c62fa6a49554a9c0243bceb (patch) | |
tree | f2e708ebea99eb48d2d1d50f7b6a97640287d5ed /drivers/gpu/drm/i915/intel_psr.c | |
parent | 782d25cac6373457b9a1c8a5efcd9194eb97ba80 (diff) | |
download | linux-3f177625ee896f5d3c62fa6a49554a9c0243bceb.tar.xz |
drm/i915: Add wait_for_us
This is for callers who want micro-second precision but are not
waiting from the atomic context.
v2:
* Fix atomic waits. (Dave Gordon)
* Use USEC_PER_SEC and USEC_PER_MSEC. (Chris Wilson)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Dave Gordon <david.s.gordon@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_psr.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_psr.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index 0b42ada338c8..b1413beb00d1 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -507,7 +507,8 @@ static void hsw_psr_disable(struct intel_dp *intel_dp) /* Wait till PSR is idle */ if (_wait_for((I915_READ(EDP_PSR_STATUS_CTL) & - EDP_PSR_STATUS_STATE_MASK) == 0, 2000, 10)) + EDP_PSR_STATUS_STATE_MASK) == 0, + 2 * USEC_PER_SEC, 10 * USEC_PER_MSEC)) DRM_ERROR("Timed out waiting for PSR Idle State\n"); dev_priv->psr.active = false; |