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authorImre Deak <imre.deak@intel.com>2019-05-09 20:34:44 +0300
committerImre Deak <imre.deak@intel.com>2019-05-14 14:06:30 +0300
commit08d8e17005a34f773f55005a153edc28fc5ab5e3 (patch)
tree7c5ebabc61185e30c0ba509abbbd070f6b4b0171 /drivers/gpu/drm/i915/intel_runtime_pm.c
parent6f08ebe779a3e5bec8ee3a14b9c15329a59221b1 (diff)
downloadlinux-08d8e17005a34f773f55005a153edc28fc5ab5e3.tar.xz
drm/i915: Replace use of PLLS power domain with DISPLAY_CORE domain
There isn't a separate power domain specific to PLLs. When programming them we require the same power domain to be enabled which is needed when accessing other display core parts (not specific to any pipe/port/transcoder). This corresponds to the DISPLAY_CORE domain added previously in this patchset, so use that instead to save bits in the power domain mask. Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190509173446.31095-10-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_runtime_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_runtime_pm.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index e89a14d2850e..b4abababdf6c 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -471,8 +471,6 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
return "VGA";
case POWER_DOMAIN_AUDIO:
return "AUDIO";
- case POWER_DOMAIN_PLLS:
- return "PLLS";
case POWER_DOMAIN_AUX_A:
return "AUX_A";
case POWER_DOMAIN_AUX_B: