diff options
| author | Manasi Navare <manasi.d.navare@intel.com> | 2021-01-23 02:26:40 +0300 |
|---|---|---|
| committer | Manasi Navare <manasi.d.navare@intel.com> | 2021-01-26 02:23:17 +0300 |
| commit | 13c6d51f530dcea38ae71d54e29b3507615e8b4b (patch) | |
| tree | d27385d5ec36420dca5a648b39b4bfb9840132b9 /drivers/gpu/drm/i915 | |
| parent | aa52b39dc554de07ef7a9eb5c80b487ebbde7e7c (diff) | |
| download | linux-13c6d51f530dcea38ae71d54e29b3507615e8b4b.tar.xz | |
drm/i915/display/vrr: Send VRR push to flip the frame
VRR achieves vblank stretching using the HW PUSH functionality.
So once the VRR is enabled during modeset then for each flip
request from userspace, in the atomic tail pipe_update_end()
we need to set the VRR push bit in HW for it to terminate
the vblank at configured flipline or anytime after flipline
or latest at the Vmax.
The HW clears the PUSH bit after the double buffer updates
are completed.
v2:
* Move send push to after irq en (Manasi)
* Call send push unconditionally (Jani N)
v3:
* Stall w.r.t Vrr vmax (Manasi, Gary Smith)
v4:
* Remove the rmw (Ville)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Gary Smith <gary.k.smith@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210122232647.22688-11-manasi.d.navare@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_sprite.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_vrr.c | 13 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_vrr.h | 1 |
3 files changed, 18 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c index ae8124fdf7de..7b7b57622b45 100644 --- a/drivers/gpu/drm/i915/display/intel_sprite.c +++ b/drivers/gpu/drm/i915/display/intel_sprite.c @@ -50,6 +50,7 @@ #include "intel_dsi.h" #include "intel_sprite.h" #include "i9xx_plane.h" +#include "intel_vrr.h" int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode, int usecs) @@ -266,6 +267,9 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) local_irq_enable(); + /* Send VRR Push to terminate Vblank */ + intel_vrr_send_push(new_crtc_state); + if (intel_vgpu_active(dev_priv)) return; diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index b2545ddc8fc5..4596a18857fe 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -121,3 +121,16 @@ void intel_vrr_enable(struct intel_encoder *encoder, intel_de_write(dev_priv, TRANS_VRR_FLIPLINE(cpu_transcoder), crtc_state->vrr.flipline - 1); intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), TRANS_PUSH_EN); } + +void intel_vrr_send_push(const struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + + if (!crtc_state->vrr.enable) + return; + + intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), + TRANS_PUSH_EN | TRANS_PUSH_SEND); +} diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index 7ec106a54ae0..e430656ca1cf 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -22,5 +22,6 @@ void intel_vrr_compute_config(struct intel_crtc_state *crtc_state, struct drm_connector_state *conn_state); void intel_vrr_enable(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state); +void intel_vrr_send_push(const struct intel_crtc_state *crtc_state); #endif /* __INTEL_VRR_H__ */ |