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authorRadhakrishna Sripada <radhakrishna.sripada@intel.com>2022-11-18 00:30:15 +0300
committerRadhakrishna Sripada <radhakrishna.sripada@intel.com>2022-11-18 21:01:37 +0300
commit244c679b4b8c45b7ecba873ae1c83482665eaac8 (patch)
treed5d504adb8d209f35f243b4714f8b94808b816f7 /drivers/gpu/drm/i915
parentec35c41d91052a3a15dd3767075620af448b8030 (diff)
downloadlinux-244c679b4b8c45b7ecba873ae1c83482665eaac8.tar.xz
drm/i915/mtl: Skip doubling channel numbers for LPDDR4/LPDDDR5
MTL LPDDR5 reported 16b with 8 channels. Previous platforms reported 32b with 4 channels and hence needed a multiplication by a factor of 2. Skip increasing the channels for MTL. v2: Use version check instead of platform check(MattR) Bspec: 64631 Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221117213015.584417-2-radhakrishna.sripada@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915')
-rw-r--r--drivers/gpu/drm/i915/display/intel_bw.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 4ace026b29bd..1c236f02b380 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -439,7 +439,8 @@ static int tgl_get_bw_info(struct drm_i915_private *dev_priv, const struct intel
return ret;
}
- if (dram_info->type == INTEL_DRAM_LPDDR4 || dram_info->type == INTEL_DRAM_LPDDR5)
+ if (DISPLAY_VER(dev_priv) < 14 &&
+ (dram_info->type == INTEL_DRAM_LPDDR4 || dram_info->type == INTEL_DRAM_LPDDR5))
num_channels *= 2;
qi.deinterleave = qi.deinterleave ? : DIV_ROUND_UP(num_channels, is_y_tile ? 4 : 2);