diff options
author | Jani Nikula <jani.nikula@intel.com> | 2024-04-29 17:02:17 +0300 |
---|---|---|
committer | Jani Nikula <jani.nikula@intel.com> | 2024-04-30 12:14:50 +0300 |
commit | 5af5a636ae57395820b231a16d39f44ee8b337dd (patch) | |
tree | 7e4bb4f8bf19cca5ca73b7ff74d07e3b14805350 /drivers/gpu/drm/i915 | |
parent | 10f9175fa20d459b71c86a96c89bcb86dbe886f6 (diff) | |
download | linux-5af5a636ae57395820b231a16d39f44ee8b337dd.tar.xz |
drm/i915: pass dev_priv explicitly to PIPE_WGC_C02
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PIPE_WGC_C02 register macro.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/550d4e787445802236f0bf89e4d2f4f32cbd6d75.1714399071.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915')
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_color.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_color_regs.h | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index cdcf8e796335..f96d6af028b6 100644 --- a/drivers/gpu/drm/i915/display/intel_color.c +++ b/drivers/gpu/drm/i915/display/intel_color.c @@ -618,7 +618,7 @@ static void vlv_load_wgc_csc(struct intel_crtc *crtc, intel_de_write_fw(dev_priv, PIPE_WGC_C01_C00(dev_priv, pipe), csc->coeff[1] << 16 | csc->coeff[0]); - intel_de_write_fw(dev_priv, PIPE_WGC_C02(pipe), + intel_de_write_fw(dev_priv, PIPE_WGC_C02(dev_priv, pipe), csc->coeff[2]); intel_de_write_fw(dev_priv, PIPE_WGC_C11_C10(pipe), @@ -643,7 +643,7 @@ static void vlv_read_wgc_csc(struct intel_crtc *crtc, csc->coeff[0] = tmp & 0xffff; csc->coeff[1] = tmp >> 16; - tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C02(pipe)); + tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C02(dev_priv, pipe)); csc->coeff[2] = tmp & 0xffff; tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C11_C10(pipe)); diff --git a/drivers/gpu/drm/i915/display/intel_color_regs.h b/drivers/gpu/drm/i915/display/intel_color_regs.h index 57438989f469..741c0b8592d9 100644 --- a/drivers/gpu/drm/i915/display/intel_color_regs.h +++ b/drivers/gpu/drm/i915/display/intel_color_regs.h @@ -257,7 +257,7 @@ #define _PIPE_A_WGC_C22 0x600C4 /* s2.10 */ #define PIPE_WGC_C01_C00(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C01_C00) -#define PIPE_WGC_C02(pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C02) +#define PIPE_WGC_C02(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C02) #define PIPE_WGC_C11_C10(pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C11_C10) #define PIPE_WGC_C12(pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C12) #define PIPE_WGC_C21_C20(pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C21_C20) |