diff options
author | Jani Nikula <jani.nikula@intel.com> | 2024-04-29 17:02:20 +0300 |
---|---|---|
committer | Jani Nikula <jani.nikula@intel.com> | 2024-04-30 12:14:50 +0300 |
commit | 9a1f5760587c358faa650c8cb682cc5ee3811cb2 (patch) | |
tree | 5027250035c8eba551cf86cd405a4c9ca6e3fc5b /drivers/gpu/drm/i915 | |
parent | 366ec5a525c7c40f431bddc599fd7c959c40212e (diff) | |
download | linux-9a1f5760587c358faa650c8cb682cc5ee3811cb2.tar.xz |
drm/i915: pass dev_priv explicitly to PIPE_WGC_C21_C20
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PIPE_WGC_C21_C20 register macro.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/af39047d304f8a5c3c7a643f702f66c06ea5d638.1714399071.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915')
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_color.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_color_regs.h | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index a4935289729d..fc27c1bda676 100644 --- a/drivers/gpu/drm/i915/display/intel_color.c +++ b/drivers/gpu/drm/i915/display/intel_color.c @@ -626,7 +626,7 @@ static void vlv_load_wgc_csc(struct intel_crtc *crtc, intel_de_write_fw(dev_priv, PIPE_WGC_C12(dev_priv, pipe), csc->coeff[5]); - intel_de_write_fw(dev_priv, PIPE_WGC_C21_C20(pipe), + intel_de_write_fw(dev_priv, PIPE_WGC_C21_C20(dev_priv, pipe), csc->coeff[7] << 16 | csc->coeff[6]); intel_de_write_fw(dev_priv, PIPE_WGC_C22(pipe), csc->coeff[8]); @@ -653,7 +653,7 @@ static void vlv_read_wgc_csc(struct intel_crtc *crtc, tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C12(dev_priv, pipe)); csc->coeff[5] = tmp & 0xffff; - tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C21_C20(pipe)); + tmp = intel_de_read_fw(dev_priv, PIPE_WGC_C21_C20(dev_priv, pipe)); csc->coeff[6] = tmp & 0xffff; csc->coeff[7] = tmp >> 16; diff --git a/drivers/gpu/drm/i915/display/intel_color_regs.h b/drivers/gpu/drm/i915/display/intel_color_regs.h index 2dc876e10eda..c2e06ccf96c4 100644 --- a/drivers/gpu/drm/i915/display/intel_color_regs.h +++ b/drivers/gpu/drm/i915/display/intel_color_regs.h @@ -260,7 +260,7 @@ #define PIPE_WGC_C02(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C02) #define PIPE_WGC_C11_C10(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C11_C10) #define PIPE_WGC_C12(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C12) -#define PIPE_WGC_C21_C20(pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C21_C20) +#define PIPE_WGC_C21_C20(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C21_C20) #define PIPE_WGC_C22(pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_A_WGC_C22) /* pipe CSC & degamma/gamma LUTs on CHV */ |