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| author | Rob Clark <robdclark@chromium.org> | 2023-07-28 00:20:10 +0300 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2023-08-08 00:19:16 +0300 |
| commit | 155668ef412fc82ff3172666831d95770141cdd6 (patch) | |
| tree | ee6f3cd01f3e53486319126a86de63d2c049e901 /drivers/gpu/drm/msm/adreno/adreno_gpu.h | |
| parent | 459f9e26e7d49f80f587d7592ccb78e00ab458e4 (diff) | |
| download | linux-155668ef412fc82ff3172666831d95770141cdd6.tar.xz | |
drm/msm/adreno: Use quirk to identify cached-coherent support
It is better to explicitly list it. With the move to opaque chip-id's
for future devices, we should avoid trying to infer things like
generation from the numerical value.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/549765/
Diffstat (limited to 'drivers/gpu/drm/msm/adreno/adreno_gpu.h')
| -rw-r--r-- | drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h index 14d7f75da77a..059e35d76e2e 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h @@ -33,6 +33,7 @@ enum { #define ADRENO_QUIRK_FAULT_DETECT_MASK BIT(1) #define ADRENO_QUIRK_LMLOADKILL_DISABLE BIT(2) #define ADRENO_QUIRK_HAS_HW_APRIV BIT(3) +#define ADRENO_QUIRK_HAS_CACHED_COHERENT BIT(4) struct adreno_rev { uint8_t core; |