diff options
author | Rob Clark <robdclark@gmail.com> | 2018-10-04 22:10:30 +0300 |
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committer | Rob Clark <robdclark@gmail.com> | 2018-10-07 21:40:19 +0300 |
commit | a69c5ed25d71c6342fbc6a52fb09b679456394e3 (patch) | |
tree | cbb0e760725432961a342206b90734a063defc1f /drivers/gpu/drm/msm/adreno/adreno_pm4.xml.h | |
parent | a2c3c0a54d4cccb35e8071a11e203c4ac06f9e4e (diff) | |
download | linux-a69c5ed25d71c6342fbc6a52fb09b679456394e3.tar.xz |
drm/msm: update generated headers
Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/adreno/adreno_pm4.xml.h')
-rw-r--r-- | drivers/gpu/drm/msm/adreno/adreno_pm4.xml.h | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/drivers/gpu/drm/msm/adreno/adreno_pm4.xml.h b/drivers/gpu/drm/msm/adreno/adreno_pm4.xml.h index 03a91e10b310..15eb03bed984 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_pm4.xml.h +++ b/drivers/gpu/drm/msm/adreno/adreno_pm4.xml.h @@ -12,12 +12,12 @@ The rules-ng-ng source files this header was generated from are: - /home/robclark/src/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2018-07-03 19:37:13) - /home/robclark/src/envytools/rnndb/adreno/a2xx.xml ( 36805 bytes, from 2018-07-03 19:37:13) - /home/robclark/src/envytools/rnndb/adreno/adreno_common.xml ( 13634 bytes, from 2018-07-03 19:37:13) -- /home/robclark/src/envytools/rnndb/adreno/adreno_pm4.xml ( 42393 bytes, from 2018-08-06 18:45:45) +- /home/robclark/src/envytools/rnndb/adreno/adreno_pm4.xml ( 42585 bytes, from 2018-10-04 19:06:37) - /home/robclark/src/envytools/rnndb/adreno/a3xx.xml ( 83840 bytes, from 2018-07-03 19:37:13) - /home/robclark/src/envytools/rnndb/adreno/a4xx.xml ( 112086 bytes, from 2018-07-03 19:37:13) -- /home/robclark/src/envytools/rnndb/adreno/a5xx.xml ( 147240 bytes, from 2018-08-06 18:45:45) -- /home/robclark/src/envytools/rnndb/adreno/a6xx.xml ( 101627 bytes, from 2018-08-06 18:45:45) -- /home/robclark/src/envytools/rnndb/adreno/a6xx_gmu.xml ( 10431 bytes, from 2018-07-03 19:37:13) +- /home/robclark/src/envytools/rnndb/adreno/a5xx.xml ( 147240 bytes, from 2018-10-04 19:06:37) +- /home/robclark/src/envytools/rnndb/adreno/a6xx.xml ( 139581 bytes, from 2018-10-04 19:06:42) +- /home/robclark/src/envytools/rnndb/adreno/a6xx_gmu.xml ( 10431 bytes, from 2018-09-14 13:03:07) - /home/robclark/src/envytools/rnndb/adreno/ocmem.xml ( 1773 bytes, from 2018-07-03 19:37:13) Copyright (C) 2013-2018 by the following authors: @@ -237,7 +237,7 @@ enum adreno_pm4_type3_packets { CP_UNK_A6XX_14 = 20, CP_UNK_A6XX_36 = 54, CP_UNK_A6XX_55 = 85, - UNK_A6XX_6D = 109, + CP_REG_WRITE = 109, }; enum adreno_state_block { @@ -968,19 +968,19 @@ static inline uint32_t CP_SET_BIN_DATA5_4_BIN_SIZE_ADDRESS_HI(uint32_t val) } #define REG_CP_SET_BIN_DATA5_5 0x00000005 -#define CP_SET_BIN_DATA5_5_XXX_ADDRESS_LO__MASK 0xffffffff -#define CP_SET_BIN_DATA5_5_XXX_ADDRESS_LO__SHIFT 0 -static inline uint32_t CP_SET_BIN_DATA5_5_XXX_ADDRESS_LO(uint32_t val) +#define CP_SET_BIN_DATA5_5_BIN_DATA_ADDR2_LO__MASK 0xffffffff +#define CP_SET_BIN_DATA5_5_BIN_DATA_ADDR2_LO__SHIFT 0 +static inline uint32_t CP_SET_BIN_DATA5_5_BIN_DATA_ADDR2_LO(uint32_t val) { - return ((val) << CP_SET_BIN_DATA5_5_XXX_ADDRESS_LO__SHIFT) & CP_SET_BIN_DATA5_5_XXX_ADDRESS_LO__MASK; + return ((val) << CP_SET_BIN_DATA5_5_BIN_DATA_ADDR2_LO__SHIFT) & CP_SET_BIN_DATA5_5_BIN_DATA_ADDR2_LO__MASK; } #define REG_CP_SET_BIN_DATA5_6 0x00000006 -#define CP_SET_BIN_DATA5_6_XXX_ADDRESS_HI__MASK 0xffffffff -#define CP_SET_BIN_DATA5_6_XXX_ADDRESS_HI__SHIFT 0 -static inline uint32_t CP_SET_BIN_DATA5_6_XXX_ADDRESS_HI(uint32_t val) +#define CP_SET_BIN_DATA5_6_BIN_DATA_ADDR2_LO__MASK 0xffffffff +#define CP_SET_BIN_DATA5_6_BIN_DATA_ADDR2_LO__SHIFT 0 +static inline uint32_t CP_SET_BIN_DATA5_6_BIN_DATA_ADDR2_LO(uint32_t val) { - return ((val) << CP_SET_BIN_DATA5_6_XXX_ADDRESS_HI__SHIFT) & CP_SET_BIN_DATA5_6_XXX_ADDRESS_HI__MASK; + return ((val) << CP_SET_BIN_DATA5_6_BIN_DATA_ADDR2_LO__SHIFT) & CP_SET_BIN_DATA5_6_BIN_DATA_ADDR2_LO__MASK; } #define REG_CP_REG_TO_MEM_0 0x00000000 |