diff options
author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2024-04-20 07:01:02 +0300 |
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committer | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2024-04-23 12:56:29 +0300 |
commit | 0e67f514486f0aec823415c379fc274dfa096c18 (patch) | |
tree | f4300d36f884625e163b98d34fe1495170b2a14c /drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | |
parent | 7120d8a0d35b02113595982aa683f93845acdc95 (diff) | |
download | linux-0e67f514486f0aec823415c379fc274dfa096c18.tar.xz |
drm/msm: merge dpu_format and mdp_format in struct msm_format
Structures dpu_format and mdp_format are largely the same structures.
In order to remove duplication between format databases, merge these two
stucture definitions into the global struct msm_format.
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/590434/
Link: https://lore.kernel.org/r/20240420-dpu-format-v2-5-9e93226cbffd@linaro.org
Diffstat (limited to 'drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c')
-rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c index 9e58f15ad47f..225c1c7768ff 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c @@ -98,7 +98,7 @@ static void dpu_hw_intf_setup_timing_engine(struct dpu_hw_intf *intf, const struct dpu_hw_intf_timing_params *p, - const struct dpu_format *fmt) + const struct msm_format *fmt) { struct dpu_hw_blk_reg_map *c = &intf->hw; u32 hsync_period, vsync_period; @@ -194,10 +194,10 @@ static void dpu_hw_intf_setup_timing_engine(struct dpu_hw_intf *intf, (p->vsync_polarity << 1) | /* VSYNC Polarity */ (p->hsync_polarity << 0); /* HSYNC Polarity */ - if (!DPU_FORMAT_IS_YUV(fmt)) - panel_format = (fmt->bits[C0_G_Y] | - (fmt->bits[C1_B_Cb] << 2) | - (fmt->bits[C2_R_Cr] << 4) | + if (!MSM_FORMAT_IS_YUV(fmt)) + panel_format = (fmt->bpc_g_y | + (fmt->bpc_b_cb << 2) | + (fmt->bpc_r_cr << 4) | (0x21 << 8)); else /* Interface treats all the pixel data in RGB888 format */ |