diff options
| author | Kalyan Thota <kalyan_t@codeaurora.org> | 2020-07-16 14:35:34 +0300 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2020-09-04 22:15:29 +0300 |
| commit | c33b7c0389e17da3619434d46be9adf3fa0eba85 (patch) | |
| tree | 904a79647c7e7fd088315faa934d228830b7d476 /drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | |
| parent | f6828e0c4045f03f9cf2df6c2a768102641183f4 (diff) | |
| download | linux-c33b7c0389e17da3619434d46be9adf3fa0eba85.tar.xz | |
drm/msm/dpu: add support for clk and bw scaling for display
This change adds support to scale src clk and bandwidth as
per composition requirements.
Interconnect registration for bw has been moved to mdp
device node from mdss to facilitate the scaling.
Changes in v1:
- Address armv7 compilation issues with the patch (Rob)
Signed-off-by: Kalyan Thota <kalyan_t@codeaurora.org>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c')
| -rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c index 7d3fdbb00e7e..cd4078807db1 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c @@ -8,7 +8,6 @@ #include <linux/irqdesc.h> #include <linux/irqchip/chained_irq.h> #include "dpu_kms.h" -#include <linux/interconnect.h> #define to_dpu_mdss(x) container_of(x, struct dpu_mdss, base) @@ -277,9 +276,11 @@ int dpu_mdss_init(struct drm_device *dev) DRM_DEBUG("mapped mdss address space @%pK\n", dpu_mdss->mmio); - ret = dpu_mdss_parse_data_bus_icc_path(dev, dpu_mdss); - if (ret) - return ret; + if (!of_device_is_compatible(dev->dev->of_node, "qcom,sc7180-mdss")) { + ret = dpu_mdss_parse_data_bus_icc_path(dev, dpu_mdss); + if (ret) + return ret; + } mp = &dpu_mdss->mp; ret = msm_dss_parse_clock(pdev, mp); |