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| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2022-02-17 08:55:26 +0300 |
|---|---|---|
| committer | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2022-07-04 21:05:28 +0300 |
| commit | d9e0f7a6631baf8b5abb2e7364101f05a5b4e7cb (patch) | |
| tree | a07cf699e0e90d3c82bb4776b3786a9354354bde /drivers/gpu/drm/msm/dp/dp_power.c | |
| parent | 1796c0255bae9d3d4528b8b3916182b2bc4e1e71 (diff) | |
| download | linux-d9e0f7a6631baf8b5abb2e7364101f05a5b4e7cb.tar.xz | |
drm/msm/dp: "inline" dp_ctrl_set_clock_rate("ctrl_link")
"ctrl_link" is the clock from DP_CTRL_PM module. The result of setting
the rate for it would be a call to dev_pm_opp_set_rate(). Instead of
saving the rate inside struct dss_module_power, call the
devm_pm_opp_set_rate() directly.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/474712/
Link: https://lore.kernel.org/r/20220217055529.499829-3-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Diffstat (limited to 'drivers/gpu/drm/msm/dp/dp_power.c')
| -rw-r--r-- | drivers/gpu/drm/msm/dp/dp_power.c | 33 |
1 files changed, 1 insertions, 32 deletions
diff --git a/drivers/gpu/drm/msm/dp/dp_power.c b/drivers/gpu/drm/msm/dp/dp_power.c index d9e011775ad8..ccb7c42c862c 100644 --- a/drivers/gpu/drm/msm/dp/dp_power.c +++ b/drivers/gpu/drm/msm/dp/dp_power.c @@ -151,44 +151,13 @@ static int dp_power_clk_deinit(struct dp_power_private *power) return 0; } -static int dp_power_clk_set_link_rate(struct dp_power_private *power, - struct dss_clk *clk_arry, int num_clk, int enable) -{ - u32 rate; - int i, rc = 0; - - for (i = 0; i < num_clk; i++) { - if (clk_arry[i].clk) { - if (clk_arry[i].type == DSS_CLK_PCLK) { - if (enable) - rate = clk_arry[i].rate; - else - rate = 0; - - rc = dev_pm_opp_set_rate(power->dev, rate); - if (rc) - break; - } - - } - } - return rc; -} - static int dp_power_clk_set_rate(struct dp_power_private *power, enum dp_pm_type module, bool enable) { int rc = 0; struct dss_module_power *mp = &power->parser->mp[module]; - if (module == DP_CTRL_PM) { - rc = dp_power_clk_set_link_rate(power, mp->clk_config, mp->num_clk, enable); - if (rc) { - DRM_ERROR("failed to set link clks rate\n"); - return rc; - } - } else { - + if (module != DP_CTRL_PM) { if (enable) { rc = msm_dss_clk_set_rate(mp->clk_config, mp->num_clk); if (rc) { |