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authorJordan Crouse <jcrouse@codeaurora.org>2017-10-20 20:07:00 +0300
committerRob Clark <robdclark@gmail.com>2017-10-28 18:01:38 +0300
commit4d87fc32dfd20ad0d4ffd5204f6e5d41d281e128 (patch)
treec18ece98db22a9aecfd7825aa29b453b59d453f3 /drivers/gpu/drm/msm/msm_gpu.h
parent4c7085a5d581a547232086b4ac0f553024eb9cec (diff)
downloadlinux-4d87fc32dfd20ad0d4ffd5204f6e5d41d281e128.tar.xz
drm/msm: Make the value of RB_CNTL (almost) generic
We use a global ringbuffer size and block size for all targets and at least for 5XX preemption we need to know the value the RB_CNTL in several locations so it makes sense to calculate it once and use it everywhere. The only monkey wrench is that we need to disable the RPTR shadow for A430 targets but that only needs to be done once and doesn't affect A5XX so we can or in the value at init time. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/msm_gpu.h')
-rw-r--r--drivers/gpu/drm/msm/msm_gpu.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
index 1be0317bb2c0..e113d64574d3 100644
--- a/drivers/gpu/drm/msm/msm_gpu.h
+++ b/drivers/gpu/drm/msm/msm_gpu.h
@@ -129,6 +129,11 @@ struct msm_gpu {
/* It turns out that all targets use the same ringbuffer size */
#define MSM_GPU_RINGBUFFER_SZ SZ_32K
+#define MSM_GPU_RINGBUFFER_BLKSIZE 32
+
+#define MSM_GPU_RB_CNTL_DEFAULT \
+ (AXXX_CP_RB_CNTL_BUFSZ(ilog2(MSM_GPU_RINGBUFFER_SZ / 8)) | \
+ AXXX_CP_RB_CNTL_BLKSZ(ilog2(MSM_GPU_RINGBUFFER_BLKSIZE / 8)))
static inline bool msm_gpu_active(struct msm_gpu *gpu)
{