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| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2023-12-03 01:42:47 +0300 |
|---|---|---|
| committer | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2023-12-05 04:09:43 +0300 |
| commit | a55c8ff252d374acb6f78b979cadc38073ce95e8 (patch) | |
| tree | ac9f076b58b0c490c0e546233bb035a132186d22 /drivers/gpu/drm/msm/msm_mdss.h | |
| parent | 7323694e118a24ab954d3a16fe59a68b311cb462 (diff) | |
| download | linux-a55c8ff252d374acb6f78b979cadc38073ce95e8.tar.xz | |
drm/msm/mdss: Handle the reg bus ICC path
Apart from the already handled data bus (MAS_MDP_Pn<->DDR), there's
another path that needs to be handled to ensure MDSS functions properly,
namely the "reg bus", a.k.a the CPU-MDSS interconnect.
Gating that path may have a variety of effects, from none to otherwise
inexplicable DSI timeouts.
Provide a way for MDSS driver to vote on this bus.
A note regarding vote values. Newer platforms have corresponding
bandwidth values in the vendor DT files. For the older platforms there
was a static vote in the mdss_mdp and rotator drivers. I choose to be
conservative here and choose this value as a default.
Co-developed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/570164/
Link: https://lore.kernel.org/r/20231202224247.1282567-5-dmitry.baryshkov@linaro.org
Diffstat (limited to 'drivers/gpu/drm/msm/msm_mdss.h')
| -rw-r--r-- | drivers/gpu/drm/msm/msm_mdss.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/msm_mdss.h b/drivers/gpu/drm/msm/msm_mdss.h index 02bbab42adbc..3afef4b1786d 100644 --- a/drivers/gpu/drm/msm/msm_mdss.h +++ b/drivers/gpu/drm/msm/msm_mdss.h @@ -14,6 +14,7 @@ struct msm_mdss_data { u32 ubwc_static; u32 highest_bank_bit; u32 macrotile_mode; + u32 reg_bus_bw; }; #define UBWC_1_0 0x10000000 |