diff options
author | Konrad Dybcio <konrad.dybcio@linaro.org> | 2023-09-25 17:50:34 +0300 |
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committer | Rob Clark <robdclark@chromium.org> | 2023-10-09 21:22:05 +0300 |
commit | af66706accdf5afef45204afc87037f876e0665c (patch) | |
tree | a390b17130fa7571ccfd162b87d853419983cdd0 /drivers/gpu/drm/msm/msm_ringbuffer.h | |
parent | 23eeae60b0fa9fb1af7623b42a55a719a4ec4597 (diff) | |
download | linux-af66706accdf5afef45204afc87037f876e0665c.tar.xz |
drm/msm/a6xx: Add skeleton A7xx support
A7xx GPUs are - from kernel's POV anyway - basically another generation
of A6xx. They build upon the A650/A660_family advancements, skipping some
writes (presumably more values are preset correctly on reset), adding
some new ones and changing others.
One notable difference is the introduction of a second shadow, called BV.
To handle this with the current code, allocate it right after the current
RPTR shadow.
BV handling and .submit are mostly based on Jonathan Marek's work.
All A7xx GPUs are assumed to have a GMU.
A702 is not an A7xx-class GPU, it's a weird forked A610.
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/559285/
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/msm_ringbuffer.h')
-rw-r--r-- | drivers/gpu/drm/msm/msm_ringbuffer.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/msm_ringbuffer.h b/drivers/gpu/drm/msm/msm_ringbuffer.h index 698b333abccd..0d6beb8cd39a 100644 --- a/drivers/gpu/drm/msm/msm_ringbuffer.h +++ b/drivers/gpu/drm/msm/msm_ringbuffer.h @@ -30,6 +30,8 @@ struct msm_gpu_submit_stats { struct msm_rbmemptrs { volatile uint32_t rptr; volatile uint32_t fence; + /* Introduced on A7xx */ + volatile uint32_t bv_fence; volatile struct msm_gpu_submit_stats stats[MSM_GPU_SUBMIT_STATS_COUNT]; volatile u64 ttbr0; |