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| author | Alexandre Courbot <acourbot@nvidia.com> | 2015-09-04 13:59:31 +0300 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2015-11-03 08:02:18 +0300 |
| commit | e396ecd178c6c8373e765d78b5b1a29e38837d3a (patch) | |
| tree | a74a905a0061f90af0ddeb188dcc8fa366e2f657 /drivers/gpu/drm/nouveau/include | |
| parent | 69c4938249fb48aeed32fd76c67972e71f471cd2 (diff) | |
| download | linux-e396ecd178c6c8373e765d78b5b1a29e38837d3a.tar.xz | |
drm/nouveau/platform: allow to specify the IOMMU bit
Current Tegra code taking advantage of the IOMMU assumes a hardcoded
value for the IOMMU bit. Make it a platform property instead for
flexibility.
v2 (Ben Skeggs): remove nvkm dependence on drm structures
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/include')
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvif/os.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/core/tegra.h | 13 |
2 files changed, 13 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvif/os.h b/drivers/gpu/drm/nouveau/include/nvif/os.h index 3accc99d8e0b..9fcab67c8557 100644 --- a/drivers/gpu/drm/nouveau/include/nvif/os.h +++ b/drivers/gpu/drm/nouveau/include/nvif/os.h @@ -27,6 +27,7 @@ #include <linux/agp_backend.h> #include <linux/reset.h> #include <linux/iommu.h> +#include <linux/of_device.h> #include <asm/unaligned.h> diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/tegra.h b/drivers/gpu/drm/nouveau/include/nvkm/core/tegra.h index 5aa2480da25f..16641cec18a2 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/core/tegra.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/core/tegra.h @@ -4,6 +4,7 @@ #include <core/mm.h> struct nvkm_device_tegra { + const struct nvkm_device_tegra_func *func; struct nvkm_device device; struct platform_device *pdev; int irq; @@ -28,7 +29,17 @@ struct nvkm_device_tegra { int gpu_speedo; }; -int nvkm_device_tegra_new(struct platform_device *, +struct nvkm_device_tegra_func { + /* + * If an IOMMU is used, indicates which address bit will trigger a + * IOMMU translation when set (when this bit is not set, IOMMU is + * bypassed). A value of 0 means an IOMMU is never used. + */ + u8 iommu_bit; +}; + +int nvkm_device_tegra_new(const struct nvkm_device_tegra_func *, + struct platform_device *, const char *cfg, const char *dbg, bool detect, bool mmio, u64 subdev_mask, struct nvkm_device **); |