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| author | Ben Skeggs <bskeggs@redhat.com> | 2018-05-08 13:39:46 +0300 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2018-05-18 08:01:21 +0300 |
| commit | a7cf01809bf23b95413d8047bd91cdc3cedd1ca1 (patch) | |
| tree | 92a72d7f2fe690c30a6b423350d09a671eabfca3 /drivers/gpu/drm/nouveau/nouveau_drm.c | |
| parent | cc36205085bb6e3a4eed1edbe413fd2235cadb27 (diff) | |
| download | linux-a7cf01809bf23b95413d8047bd91cdc3cedd1ca1.tar.xz | |
drm/nouveau/fifo/gk104-: require explicit runlist selection for channel allocation
We didn't used to be aware that runlist/engine IDs weren't the same thing,
or that there was such variability in configuration between GPUs.
By exposing this information to a client, and giving it explicit control
of which runlist it's allocating a channel on, we're able to make better
choices.
The immediate effect of this is that on GPUs where CE0 is the "GRCE", we
will now be allocating a copy engine running asynchronously to GR for BO
migrations - as intended.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_drm.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_drm.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c index dddd42592472..6caece4f2f5f 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drm.c +++ b/drivers/gpu/drm/nouveau/nouveau_drm.c @@ -38,6 +38,7 @@ #include <core/tegra.h> #include <nvif/driver.h> +#include <nvif/fifo.h> #include <nvif/class.h> #include <nvif/cl0002.h> @@ -358,13 +359,12 @@ nouveau_accel_init(struct nouveau_drm *drm) if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { ret = nouveau_channel_new(drm, &drm->client.device, - NVA06F_V0_ENGINE_CE0 | - NVA06F_V0_ENGINE_CE1, - 0, &drm->cechan); + nvif_fifo_runlist_ce(device), 0, + &drm->cechan); if (ret) NV_ERROR(drm, "failed to create ce channel, %d\n", ret); - arg0 = NVA06F_V0_ENGINE_GR; + arg0 = nvif_fifo_runlist(device, NV_DEVICE_INFO_ENGINE_GR); arg1 = 1; } else if (device->info.chipset >= 0xa3 && |