diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2020-12-04 09:13:27 +0300 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2021-02-11 04:50:00 +0300 |
commit | 8d6461d832df2544664eb0979cc849318e78cd0e (patch) | |
tree | 7b7dad612be2af249d3d64d8594ab673bfca44cc /drivers/gpu/drm/nouveau | |
parent | d1866250a22278859e1ec952ff62d2044ee37533 (diff) | |
download | linux-8d6461d832df2544664eb0979cc849318e78cd0e.tar.xz |
drm/nouveau/sw: switch to instanced constructor
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau')
-rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/core/device.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/core/engine.h | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/core/layout.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/core/subdev.h | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/core/engine.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/core/subdev.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | 155 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/sw/priv.h | 4 |
14 files changed, 102 insertions, 114 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/device.h b/drivers/gpu/drm/nouveau/include/nvkm/core/device.h index 9e42463eef45..a7fee7a22d73 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/core/device.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/core/device.h @@ -60,7 +60,6 @@ struct nvkm_device { struct notifier_block nb; } acpi; - struct nvkm_sw *sw; struct nvkm_engine *vic; #define NVKM_LAYOUT_ONCE(type,data,ptr) data *ptr; @@ -103,7 +102,6 @@ struct nvkm_device_chip { #undef NVKM_LAYOUT_INST #undef NVKM_LAYOUT_ONCE - int (*sw )(struct nvkm_device *, int idx, struct nvkm_sw **); int (*vic )(struct nvkm_device *, int idx, struct nvkm_engine **); }; diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/engine.h b/drivers/gpu/drm/nouveau/include/nvkm/core/engine.h index c1bd0e075075..e58923b67d74 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/core/engine.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/core/engine.h @@ -47,12 +47,8 @@ struct nvkm_engine_func { struct nvkm_sclass sclass[]; }; -int nvkm_engine_ctor_(const struct nvkm_engine_func *, bool old, struct nvkm_device *, +int nvkm_engine_ctor(const struct nvkm_engine_func *, struct nvkm_device *, enum nvkm_subdev_type, int inst, bool enable, struct nvkm_engine *); -#define nvkm_engine_ctor_o(f,d,i, e,s) nvkm_engine_ctor_((f), true, (d), (i), -1 , (e), (s)) -#define nvkm_engine_ctor_n(f,d,t,i,e,s) nvkm_engine_ctor_((f), false, (d), (t), (i), (e), (s)) -#define nvkm_engine_ctor__(_1,_2,_3,_4,_5,_6,IMPL,...) IMPL -#define nvkm_engine_ctor(A...) nvkm_engine_ctor__(A, nvkm_engine_ctor_n, nvkm_engine_ctor_o)(A) int nvkm_engine_new_(const struct nvkm_engine_func *, struct nvkm_device *, enum nvkm_subdev_type, int, bool enable, struct nvkm_engine **); diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h b/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h index 1c543734a490..d365b1a386c2 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h @@ -44,4 +44,5 @@ NVKM_LAYOUT_INST(NVKM_ENGINE_NVENC , struct nvkm_nvenc , nvenc, 3) NVKM_LAYOUT_ONCE(NVKM_ENGINE_PM , struct nvkm_pm , pm) NVKM_LAYOUT_ONCE(NVKM_ENGINE_SEC , struct nvkm_engine , sec) NVKM_LAYOUT_ONCE(NVKM_ENGINE_SEC2 , struct nvkm_sec2 , sec2) +NVKM_LAYOUT_ONCE(NVKM_ENGINE_SW , struct nvkm_sw , sw) NVKM_LAYOUT_ONCE(NVKM_ENGINE_VP , struct nvkm_engine , vp) diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/subdev.h b/drivers/gpu/drm/nouveau/include/nvkm/core/subdev.h index efde81b9b046..34146e5759e3 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/core/subdev.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/core/subdev.h @@ -106,12 +106,8 @@ struct nvkm_subdev_func { extern const char *nvkm_subdev_type[NVKM_SUBDEV_NR]; int nvkm_subdev_new_(const struct nvkm_subdev_func *, struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_subdev **); -void nvkm_subdev_ctor_(const struct nvkm_subdev_func *, bool old, struct nvkm_device *, - enum nvkm_subdev_type, int inst, struct nvkm_subdev *); -#define nvkm_subdev_ctor_o(f,d,i, s) nvkm_subdev_ctor_((f), true, (d), (i), -1 , (s)) -#define nvkm_subdev_ctor_n(f,d,t,i,s) nvkm_subdev_ctor_((f), false, (d), (t), (i), (s)) -#define nvkm_subdev_ctor__(_1,_2,_3,_4,_5,IMPL,...) IMPL -#define nvkm_subdev_ctor(A...) nvkm_subdev_ctor__(A, nvkm_subdev_ctor_n, nvkm_subdev_ctor_o)(A) +void nvkm_subdev_ctor(const struct nvkm_subdev_func *, struct nvkm_device *, + enum nvkm_subdev_type, int inst, struct nvkm_subdev *); void nvkm_subdev_disable(struct nvkm_device *, enum nvkm_subdev_type, int inst); void nvkm_subdev_del(struct nvkm_subdev **); int nvkm_subdev_preinit(struct nvkm_subdev *); diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h index 2e91769e3ee2..b1a53ffbfdef 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h @@ -12,8 +12,8 @@ struct nvkm_sw { bool nvkm_sw_mthd(struct nvkm_sw *sw, int chid, int subc, u32 mthd, u32 data); -int nv04_sw_new(struct nvkm_device *, int, struct nvkm_sw **); -int nv10_sw_new(struct nvkm_device *, int, struct nvkm_sw **); -int nv50_sw_new(struct nvkm_device *, int, struct nvkm_sw **); -int gf100_sw_new(struct nvkm_device *, int, struct nvkm_sw **); +int nv04_sw_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_sw **); +int nv10_sw_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_sw **); +int nv50_sw_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_sw **); +int gf100_sw_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_sw **); #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/core/engine.c b/drivers/gpu/drm/nouveau/nvkm/core/engine.c index bb5440b0a602..e41a39ae1597 100644 --- a/drivers/gpu/drm/nouveau/nvkm/core/engine.c +++ b/drivers/gpu/drm/nouveau/nvkm/core/engine.c @@ -176,10 +176,10 @@ nvkm_engine = { }; int -nvkm_engine_ctor_(const struct nvkm_engine_func *func, bool old, struct nvkm_device *device, - enum nvkm_subdev_type type, int inst, bool enable, struct nvkm_engine *engine) +nvkm_engine_ctor(const struct nvkm_engine_func *func, struct nvkm_device *device, + enum nvkm_subdev_type type, int inst, bool enable, struct nvkm_engine *engine) { - nvkm_subdev_ctor_(&nvkm_engine, old, device, type, inst, &engine->subdev); + nvkm_subdev_ctor(&nvkm_engine, device, type, inst, &engine->subdev); engine->func = func; refcount_set(&engine->use.refcount, 0); mutex_init(&engine->use.mutex); diff --git a/drivers/gpu/drm/nouveau/nvkm/core/subdev.c b/drivers/gpu/drm/nouveau/nvkm/core/subdev.c index aa6a93ba32dd..e97dbc26dc15 100644 --- a/drivers/gpu/drm/nouveau/nvkm/core/subdev.c +++ b/drivers/gpu/drm/nouveau/nvkm/core/subdev.c @@ -33,7 +33,6 @@ nvkm_subdev_type[NVKM_SUBDEV_NR] = { #include <core/layout.h> #undef NVKM_LAYOUT_ONCE #undef NVKM_LAYOUT_INST - [NVKM_ENGINE_SW ] = "sw", [NVKM_ENGINE_VIC ] = "vic", }; @@ -169,9 +168,8 @@ nvkm_subdev_disable(struct nvkm_device *device, enum nvkm_subdev_type type, int } void -nvkm_subdev_ctor_(const struct nvkm_subdev_func *func, bool old, - struct nvkm_device *device, enum nvkm_subdev_type type, int inst, - struct nvkm_subdev *subdev) +nvkm_subdev_ctor(const struct nvkm_subdev_func *func, struct nvkm_device *device, + enum nvkm_subdev_type type, int inst, struct nvkm_subdev *subdev) { subdev->func = func; subdev->device = device; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index d5b5f9eb5082..c994b9547a49 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -92,7 +92,7 @@ nv4_chipset = { .dma = { 0x00000001, nv04_dma_new }, .fifo = { 0x00000001, nv04_fifo_new }, .gr = { 0x00000001, nv04_gr_new }, - .sw = nv04_sw_new, + .sw = { 0x00000001, nv04_sw_new }, }; static const struct nvkm_device_chip @@ -113,7 +113,7 @@ nv5_chipset = { .dma = { 0x00000001, nv04_dma_new }, .fifo = { 0x00000001, nv04_fifo_new }, .gr = { 0x00000001, nv04_gr_new }, - .sw = nv04_sw_new, + .sw = { 0x00000001, nv04_sw_new }, }; static const struct nvkm_device_chip @@ -155,7 +155,7 @@ nv11_chipset = { .dma = { 0x00000001, nv04_dma_new }, .fifo = { 0x00000001, nv10_fifo_new }, .gr = { 0x00000001, nv15_gr_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -177,7 +177,7 @@ nv15_chipset = { .dma = { 0x00000001, nv04_dma_new }, .fifo = { 0x00000001, nv10_fifo_new }, .gr = { 0x00000001, nv15_gr_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -199,7 +199,7 @@ nv17_chipset = { .dma = { 0x00000001, nv04_dma_new }, .fifo = { 0x00000001, nv17_fifo_new }, .gr = { 0x00000001, nv17_gr_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -221,7 +221,7 @@ nv18_chipset = { .dma = { 0x00000001, nv04_dma_new }, .fifo = { 0x00000001, nv17_fifo_new }, .gr = { 0x00000001, nv17_gr_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -243,7 +243,7 @@ nv1a_chipset = { .dma = { 0x00000001, nv04_dma_new }, .fifo = { 0x00000001, nv10_fifo_new }, .gr = { 0x00000001, nv15_gr_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -265,7 +265,7 @@ nv1f_chipset = { .dma = { 0x00000001, nv04_dma_new }, .fifo = { 0x00000001, nv17_fifo_new }, .gr = { 0x00000001, nv17_gr_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -287,7 +287,7 @@ nv20_chipset = { .dma = { 0x00000001, nv04_dma_new }, .fifo = { 0x00000001, nv17_fifo_new }, .gr = { 0x00000001, nv20_gr_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -309,7 +309,7 @@ nv25_chipset = { .dma = { 0x00000001, nv04_dma_new }, .fifo = { 0x00000001, nv17_fifo_new }, .gr = { 0x00000001, nv25_gr_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -331,7 +331,7 @@ nv28_chipset = { .dma = { 0x00000001, nv04_dma_new }, .fifo = { 0x00000001, nv17_fifo_new }, .gr = { 0x00000001, nv25_gr_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -353,7 +353,7 @@ nv2a_chipset = { .dma = { 0x00000001, nv04_dma_new }, .fifo = { 0x00000001, nv17_fifo_new }, .gr = { 0x00000001, nv2a_gr_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -375,7 +375,7 @@ nv30_chipset = { .dma = { 0x00000001, nv04_dma_new }, .fifo = { 0x00000001, nv17_fifo_new }, .gr = { 0x00000001, nv30_gr_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -398,7 +398,7 @@ nv31_chipset = { .fifo = { 0x00000001, nv17_fifo_new }, .gr = { 0x00000001, nv30_gr_new }, .mpeg = { 0x00000001, nv31_mpeg_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -421,7 +421,7 @@ nv34_chipset = { .fifo = { 0x00000001, nv17_fifo_new }, .gr = { 0x00000001, nv34_gr_new }, .mpeg = { 0x00000001, nv31_mpeg_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -443,7 +443,7 @@ nv35_chipset = { .dma = { 0x00000001, nv04_dma_new }, .fifo = { 0x00000001, nv17_fifo_new }, .gr = { 0x00000001, nv35_gr_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -466,7 +466,7 @@ nv36_chipset = { .fifo = { 0x00000001, nv17_fifo_new }, .gr = { 0x00000001, nv35_gr_new }, .mpeg = { 0x00000001, nv31_mpeg_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -492,7 +492,7 @@ nv40_chipset = { .gr = { 0x00000001, nv40_gr_new }, .mpeg = { 0x00000001, nv40_mpeg_new }, .pm = { 0x00000001, nv40_pm_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -518,7 +518,7 @@ nv41_chipset = { .gr = { 0x00000001, nv40_gr_new }, .mpeg = { 0x00000001, nv40_mpeg_new }, .pm = { 0x00000001, nv40_pm_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -544,7 +544,7 @@ nv42_chipset = { .gr = { 0x00000001, nv40_gr_new }, .mpeg = { 0x00000001, nv40_mpeg_new }, .pm = { 0x00000001, nv40_pm_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -570,7 +570,7 @@ nv43_chipset = { .gr = { 0x00000001, nv40_gr_new }, .mpeg = { 0x00000001, nv40_mpeg_new }, .pm = { 0x00000001, nv40_pm_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -596,7 +596,7 @@ nv44_chipset = { .gr = { 0x00000001, nv44_gr_new }, .mpeg = { 0x00000001, nv44_mpeg_new }, .pm = { 0x00000001, nv40_pm_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -622,7 +622,7 @@ nv45_chipset = { .gr = { 0x00000001, nv40_gr_new }, .mpeg = { 0x00000001, nv44_mpeg_new }, .pm = { 0x00000001, nv40_pm_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -648,7 +648,7 @@ nv46_chipset = { .gr = { 0x00000001, nv44_gr_new }, .mpeg = { 0x00000001, nv44_mpeg_new }, .pm = { 0x00000001, nv40_pm_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -674,7 +674,7 @@ nv47_chipset = { .gr = { 0x00000001, nv40_gr_new }, .mpeg = { 0x00000001, nv44_mpeg_new }, .pm = { 0x00000001, nv40_pm_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -700,7 +700,7 @@ nv49_chipset = { .gr = { 0x00000001, nv40_gr_new }, .mpeg = { 0x00000001, nv44_mpeg_new }, .pm = { 0x00000001, nv40_pm_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -726,7 +726,7 @@ nv4a_chipset = { .gr = { 0x00000001, nv44_gr_new }, .mpeg = { 0x00000001, nv44_mpeg_new }, .pm = { 0x00000001, nv40_pm_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -752,7 +752,7 @@ nv4b_chipset = { .gr = { 0x00000001, nv40_gr_new }, .mpeg = { 0x00000001, nv44_mpeg_new }, .pm = { 0x00000001, nv40_pm_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -778,7 +778,7 @@ nv4c_chipset = { .gr = { 0x00000001, nv44_gr_new }, .mpeg = { 0x00000001, nv44_mpeg_new }, .pm = { 0x00000001, nv40_pm_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -804,7 +804,7 @@ nv4e_chipset = { .gr = { 0x00000001, nv44_gr_new }, .mpeg = { 0x00000001, nv44_mpeg_new }, .pm = { 0x00000001, nv40_pm_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -833,7 +833,7 @@ nv50_chipset = { .gr = { 0x00000001, nv50_gr_new }, .mpeg = { 0x00000001, nv50_mpeg_new }, .pm = { 0x00000001, nv50_pm_new }, - .sw = nv50_sw_new, + .sw = { 0x00000001, nv50_sw_new }, }; static const struct nvkm_device_chip @@ -859,7 +859,7 @@ nv63_chipset = { .gr = { 0x00000001, nv44_gr_new }, .mpeg = { 0x00000001, nv44_mpeg_new }, .pm = { 0x00000001, nv40_pm_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -885,7 +885,7 @@ nv67_chipset = { .gr = { 0x00000001, nv44_gr_new }, .mpeg = { 0x00000001, nv44_mpeg_new }, .pm = { 0x00000001, nv40_pm_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -911,7 +911,7 @@ nv68_chipset = { .gr = { 0x00000001, nv44_gr_new }, .mpeg = { 0x00000001, nv44_mpeg_new }, .pm = { 0x00000001, nv40_pm_new }, - .sw = nv10_sw_new, + .sw = { 0x00000001, nv10_sw_new }, }; static const struct nvkm_device_chip @@ -942,7 +942,7 @@ nv84_chipset = { .gr = { 0x00000001, g84_gr_new }, .mpeg = { 0x00000001, g84_mpeg_new }, .pm = { 0x00000001, g84_pm_new }, - .sw = nv50_sw_new, + .sw = { 0x00000001, nv50_sw_new }, .vp = { 0x00000001, g84_vp_new }, }; @@ -974,7 +974,7 @@ nv86_chipset = { .gr = { 0x00000001, g84_gr_new }, .mpeg = { 0x00000001, g84_mpeg_new }, .pm = { 0x00000001, g84_pm_new }, - .sw = nv50_sw_new, + .sw = { 0x00000001, nv50_sw_new }, .vp = { 0x00000001, g84_vp_new }, }; @@ -1006,7 +1006,7 @@ nv92_chipset = { .gr = { 0x00000001, g84_gr_new }, .mpeg = { 0x00000001, g84_mpeg_new }, .pm = { 0x00000001, g84_pm_new }, - .sw = nv50_sw_new, + .sw = { 0x00000001, nv50_sw_new }, .vp = { 0x00000001, g84_vp_new }, }; @@ -1038,7 +1038,7 @@ nv94_chipset = { .gr = { 0x00000001, g84_gr_new }, .mpeg = { 0x00000001, g84_mpeg_new }, .pm = { 0x00000001, g84_pm_new }, - .sw = nv50_sw_new, + .sw = { 0x00000001, nv50_sw_new }, .vp = { 0x00000001, g84_vp_new }, }; @@ -1070,7 +1070,7 @@ nv96_chipset = { .gr = { 0x00000001, g84_gr_new }, .mpeg = { 0x00000001, g84_mpeg_new }, .pm = { 0x00000001, g84_pm_new }, - .sw = nv50_sw_new, + .sw = { 0x00000001, nv50_sw_new }, .vp = { 0x00000001, g84_vp_new }, }; @@ -1103,7 +1103,7 @@ nv98_chipset = { .msvld = { 0x00000001, g98_msvld_new }, .pm = { 0x00000001, g84_pm_new }, .sec = { 0x00000001, g98_sec_new }, - .sw = nv50_sw_new, + .sw = { 0x00000001, nv50_sw_new }, }; static const struct nvkm_device_chip @@ -1134,7 +1134,7 @@ nva0_chipset = { .gr = { 0x00000001, gt200_gr_new }, .mpeg = { 0x00000001, g84_mpeg_new }, .pm = { 0x00000001, gt200_pm_new }, - .sw = nv50_sw_new, + .sw = { 0x00000001, nv50_sw_new }, .vp = { 0x00000001, g84_vp_new }, }; @@ -1169,7 +1169,7 @@ nva3_chipset = { .msppp = { 0x00000001, gt215_msppp_new }, .msvld = { 0x00000001, gt215_msvld_new }, .pm = { 0x00000001, gt215_pm_new }, - .sw = nv50_sw_new, + .sw = { 0x00000001, nv50_sw_new }, }; static const struct nvkm_device_chip @@ -1202,7 +1202,7 @@ nva5_chipset = { .msppp = { 0x00000001, gt215_msppp_new }, .msvld = { 0x00000001, gt215_msvld_new }, .pm = { 0x00000001, gt215_pm_new }, - .sw = nv50_sw_new, + .sw = { 0x00000001, nv50_sw_new }, }; static const struct nvkm_device_chip @@ -1235,7 +1235,7 @@ nva8_chipset = { .msppp = { 0x00000001, gt215_msppp_new }, .msvld = { 0x00000001, gt215_msvld_new }, .pm = { 0x00000001, gt215_pm_new }, - .sw = nv50_sw_new, + .sw = { 0x00000001, nv50_sw_new }, }; static const struct nvkm_device_chip @@ -1267,7 +1267,7 @@ nvaa_chipset = { .msvld = { 0x00000001, g98_msvld_new }, .pm = { 0x00000001, g84_pm_new }, .sec = { 0x00000001, g98_sec_new }, - .sw = nv50_sw_new, + .sw = { 0x00000001, nv50_sw_new }, }; static const struct nvkm_device_chip @@ -1299,7 +1299,7 @@ nvac_chipset = { .msvld = { 0x00000001, g98_msvld_new }, .pm = { 0x00000001, g84_pm_new }, .sec = { 0x00000001, g98_sec_new }, - .sw = nv50_sw_new, + .sw = { 0x00000001, nv50_sw_new }, }; static const struct nvkm_device_chip @@ -1332,7 +1332,7 @@ nvaf_chipset = { .msppp = { 0x00000001, gt215_msppp_new }, .msvld = { 0x00000001, mcp89_msvld_new }, .pm = { 0x00000001, gt215_pm_new }, - .sw = nv50_sw_new, + .sw = { 0x00000001, nv50_sw_new }, }; static const struct nvkm_device_chip @@ -1368,7 +1368,7 @@ nvc0_chipset = { .msppp = { 0x00000001, gf100_msppp_new }, .msvld = { 0x00000001, gf100_msvld_new }, .pm = { 0x00000001, gf100_pm_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -1404,7 +1404,7 @@ nvc1_chipset = { .msppp = { 0x00000001, gf100_msppp_new }, .msvld = { 0x00000001, gf100_msvld_new }, .pm = { 0x00000001, gf108_pm_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -1440,7 +1440,7 @@ nvc3_chipset = { .msppp = { 0x00000001, gf100_msppp_new }, .msvld = { 0x00000001, gf100_msvld_new }, .pm = { 0x00000001, gf100_pm_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -1476,7 +1476,7 @@ nvc4_chipset = { .msppp = { 0x00000001, gf100_msppp_new }, .msvld = { 0x00000001, gf100_msvld_new }, .pm = { 0x00000001, gf100_pm_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -1512,7 +1512,7 @@ nvc8_chipset = { .msppp = { 0x00000001, gf100_msppp_new }, .msvld = { 0x00000001, gf100_msvld_new }, .pm = { 0x00000001, gf100_pm_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -1548,7 +1548,7 @@ nvce_chipset = { .msppp = { 0x00000001, gf100_msppp_new }, .msvld = { 0x00000001, gf100_msvld_new }, .pm = { 0x00000001, gf100_pm_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -1584,7 +1584,7 @@ nvcf_chipset = { .msppp = { 0x00000001, gf100_msppp_new }, .msvld = { 0x00000001, gf100_msvld_new }, .pm = { 0x00000001, gf100_pm_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -1619,7 +1619,7 @@ nvd7_chipset = { .msppp = { 0x00000001, gf100_msppp_new }, .msvld = { 0x00000001, gf100_msvld_new }, .pm = { 0x00000001, gf117_pm_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -1655,7 +1655,7 @@ nvd9_chipset = { .msppp = { 0x00000001, gf100_msppp_new }, .msvld = { 0x00000001, gf100_msvld_new }, .pm = { 0x00000001, gf117_pm_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -1692,7 +1692,7 @@ nve4_chipset = { .msppp = { 0x00000001, gf100_msppp_new }, .msvld = { 0x00000001, gk104_msvld_new }, .pm = { 0x00000001, gk104_pm_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -1729,7 +1729,7 @@ nve6_chipset = { .msppp = { 0x00000001, gf100_msppp_new }, .msvld = { 0x00000001, gk104_msvld_new }, .pm = { 0x00000001, gk104_pm_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -1766,7 +1766,7 @@ nve7_chipset = { .msppp = { 0x00000001, gf100_msppp_new }, .msvld = { 0x00000001, gk104_msvld_new }, .pm = { 0x00000001, gk104_pm_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -1791,7 +1791,7 @@ nvea_chipset = { .fifo = { 0x00000001, gk20a_fifo_new }, .gr = { 0x00000001, gk20a_gr_new }, .pm = { 0x00000001, gk104_pm_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -1827,7 +1827,7 @@ nvf0_chipset = { .mspdec = { 0x00000001, gk104_mspdec_new }, .msppp = { 0x00000001, gf100_msppp_new }, .msvld = { 0x00000001, gk104_msvld_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -1863,7 +1863,7 @@ nvf1_chipset = { .mspdec = { 0x00000001, gk104_mspdec_new }, .msppp = { 0x00000001, gf100_msppp_new }, .msvld = { 0x00000001, gk104_msvld_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -1899,7 +1899,7 @@ nv106_chipset = { .mspdec = { 0x00000001, gk104_mspdec_new }, .msppp = { 0x00000001, gf100_msppp_new }, .msvld = { 0x00000001, gk104_msvld_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -1935,7 +1935,7 @@ nv108_chipset = { .mspdec = { 0x00000001, gk104_mspdec_new }, .msppp = { 0x00000001, gf100_msppp_new }, .msvld = { 0x00000001, gk104_msvld_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -1970,7 +1970,7 @@ nv117_chipset = { .gr = { 0x00000001, gm107_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000001, gm107_nvenc_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -2003,7 +2003,7 @@ nv118_chipset = { .dma = { 0x00000001, gf119_dma_new }, .fifo = { 0x00000001, gm107_fifo_new }, .gr = { 0x00000001, gm107_gr_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -2038,7 +2038,7 @@ nv120_chipset = { .gr = { 0x00000001, gm200_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000003, gm107_nvenc_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -2073,7 +2073,7 @@ nv124_chipset = { .gr = { 0x00000001, gm200_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000003, gm107_nvenc_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -2108,7 +2108,7 @@ nv126_chipset = { .gr = { 0x00000001, gm200_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000001, gm107_nvenc_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -2133,7 +2133,7 @@ nv12b_chipset = { .dma = { 0x00000001, gf119_dma_new }, .fifo = { 0x00000001, gm20b_fifo_new }, .gr = { 0x00000001, gm20b_gr_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -2166,7 +2166,7 @@ nv130_chipset = { .gr = { 0x00000001, gp100_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000007, gm107_nvenc_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -2200,7 +2200,7 @@ nv132_chipset = { .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000003, gm107_nvenc_new }, .sec2 = { 0x00000001, gp102_sec2_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -2234,7 +2234,7 @@ nv134_chipset = { .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000003, gm107_nvenc_new }, .sec2 = { 0x00000001, gp102_sec2_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -2268,7 +2268,7 @@ nv136_chipset = { .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000001, gm107_nvenc_new }, .sec2 = { 0x00000001, gp102_sec2_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -2302,7 +2302,7 @@ nv137_chipset = { .nvdec = { 0x00000001, gm107_nvdec_new }, .nvenc = { 0x00000003, gm107_nvenc_new }, .sec2 = { 0x00000001, gp102_sec2_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -2335,7 +2335,7 @@ nv138_chipset = { .gr = { 0x00000001, gp108_gr_new }, .nvdec = { 0x00000001, gm107_nvdec_new }, .sec2 = { 0x00000001, gp108_sec2_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -2359,7 +2359,7 @@ nv13b_chipset = { .dma = { 0x00000001, gf119_dma_new }, .fifo = { 0x00000001, gp10b_fifo_new }, .gr = { 0x00000001, gp10b_gr_new }, - .sw = gf100_sw_new, + .sw = { 0x00000001, gf100_sw_new }, }; static const struct nvkm_device_chip @@ -3162,7 +3162,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func, #include <core/layout.h> #undef NVKM_LAYOUT_INST #undef NVKM_LAYOUT_ONCE - _(NVKM_ENGINE_SW , sw); _(NVKM_ENGINE_VIC , vic); case NVKM_ENGINE_CE1: case NVKM_ENGINE_CE2: diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c index 7be3198e11de..14871d0bd746 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c @@ -97,7 +97,7 @@ nvkm_sw = { int nvkm_sw_new_(const struct nvkm_sw_func *func, struct nvkm_device *device, - int index, struct nvkm_sw **psw) + enum nvkm_subdev_type type, int inst, struct nvkm_sw **psw) { struct nvkm_sw *sw; @@ -106,5 +106,5 @@ nvkm_sw_new_(const struct nvkm_sw_func *func, struct nvkm_device *device, INIT_LIST_HEAD(&sw->chan); sw->func = func; - return nvkm_engine_ctor(&nvkm_sw, device, index, true, &sw->engine); + return nvkm_engine_ctor(&nvkm_sw, device, type, inst, true, &sw->engine); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c index ea8f4247b628..55abf839f29d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c @@ -149,7 +149,7 @@ gf100_sw = { }; int -gf100_sw_new(struct nvkm_device *device, int index, struct nvkm_sw **psw) +gf100_sw_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_sw **psw) { - return nvkm_sw_new_(&gf100_sw, device, index, psw); + return nvkm_sw_new_(&gf100_sw, device, type, inst, psw); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c index b6675fe1b0ce..4aa57573869c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c @@ -133,7 +133,7 @@ nv04_sw = { }; int -nv04_sw_new(struct nvkm_device *device, int index, struct nvkm_sw **psw) +nv04_sw_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_sw **psw) { - return nvkm_sw_new_(&nv04_sw, device, index, psw); + return nvkm_sw_new_(&nv04_sw, device, type, inst, psw); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c index 09d22fcd194c..e79e640ae535 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv10.c @@ -62,7 +62,7 @@ nv10_sw = { }; int -nv10_sw_new(struct nvkm_device *device, int index, struct nvkm_sw **psw) +nv10_sw_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_sw **psw) { - return nvkm_sw_new_(&nv10_sw, device, index, psw); + return nvkm_sw_new_(&nv10_sw, device, type, inst, psw); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c index 01573d187f2c..1fdd094c8b7e 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c @@ -142,7 +142,7 @@ nv50_sw = { }; int -nv50_sw_new(struct nvkm_device *device, int index, struct nvkm_sw **psw) +nv50_sw_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_sw **psw) { - return nvkm_sw_new_(&nv50_sw, device, index, psw); + return nvkm_sw_new_(&nv50_sw, device, type, inst, psw); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sw/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/sw/priv.h index 6d18fc6180f2..d9d83b1b8849 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sw/priv.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sw/priv.h @@ -5,8 +5,8 @@ #include <engine/sw.h> struct nvkm_sw_chan; -int nvkm_sw_new_(const struct nvkm_sw_func *, struct nvkm_device *, - int index, struct nvkm_sw **); +int nvkm_sw_new_(const struct nvkm_sw_func *, struct nvkm_device *, enum nvkm_subdev_type, int, + struct nvkm_sw **); struct nvkm_sw_chan_sclass { int (*ctor)(struct nvkm_sw_chan *, const struct nvkm_oclass *, |