diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2018-02-06 12:35:38 +0300 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2018-02-07 11:08:40 +0300 |
commit | eedd6033b4c88d559afd7c8ac8a76fefcd9834a6 (patch) | |
tree | 2e276f18b5ce5ef45461abe4481318feb20367fd /drivers/gpu/drm/pl111/pl111_display.c | |
parent | 6470b7ddec69dc2edd4bcb01eab3cf71ead5f794 (diff) | |
download | linux-eedd6033b4c88d559afd7c8ac8a76fefcd9834a6.tar.xz |
drm/pl111: Support variants with broken clock divider
The early Integrator CLCD synthesized in the Integrator CP and
IM-PD1 FPGAs are broken: their clock dividers do not work
properly. Support disabling the clock divider and drive the
clock directly from the parent under these circumstances.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20180206093540.8147-3-linus.walleij@linaro.org
Diffstat (limited to 'drivers/gpu/drm/pl111/pl111_display.c')
-rw-r--r-- | drivers/gpu/drm/pl111/pl111_display.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c index 55ada00ec974..4d4e38b4c9d5 100644 --- a/drivers/gpu/drm/pl111/pl111_display.c +++ b/drivers/gpu/drm/pl111/pl111_display.c @@ -138,6 +138,9 @@ static void pl111_display_enable(struct drm_simple_display_pipe *pipe, tim2 = readl(priv->regs + CLCD_TIM2); tim2 &= (TIM2_BCD | TIM2_PCD_LO_MASK | TIM2_PCD_HI_MASK); + if (priv->variant->broken_clockdivider) + tim2 |= TIM2_BCD; + if (mode->flags & DRM_MODE_FLAG_NHSYNC) tim2 |= TIM2_IHS; @@ -455,6 +458,11 @@ pl111_init_clock_divider(struct drm_device *drm) dev_err(drm->dev, "CLCD: unable to get clcdclk.\n"); return PTR_ERR(parent); } + /* If the clock divider is broken, use the parent directly */ + if (priv->variant->broken_clockdivider) { + priv->clk = parent; + return 0; + } parent_name = __clk_get_name(parent); spin_lock_init(&priv->tim2_lock); |