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authorAlex Deucher <alexander.deucher@amd.com>2013-08-23 01:09:06 +0400
committerChristian König <christian.koenig@amd.com>2014-02-18 19:11:35 +0400
commit5ad6bf91ef8fd265aee252982a7d6fcf78436153 (patch)
tree2bc7ef1b06b498fea3ba864f5d2eb5019f67a1a7 /drivers/gpu/drm/radeon/cikd.h
parent58bd2a88facbdf3c39db0f834111cd4294400814 (diff)
downloadlinux-5ad6bf91ef8fd265aee252982a7d6fcf78436153.tar.xz
drm/radeon: fill in set_vce_clocks for CIK asics
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/cikd.h')
-rw-r--r--drivers/gpu/drm/radeon/cikd.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/cikd.h b/drivers/gpu/drm/radeon/cikd.h
index 459ae021d91c..ee16380ceba8 100644
--- a/drivers/gpu/drm/radeon/cikd.h
+++ b/drivers/gpu/drm/radeon/cikd.h
@@ -203,6 +203,12 @@
#define CTF_TEMP_MASK 0x0003fe00
#define CTF_TEMP_SHIFT 9
+#define CG_ECLK_CNTL 0xC05000AC
+# define ECLK_DIVIDER_MASK 0x7f
+# define ECLK_DIR_CNTL_EN (1 << 8)
+#define CG_ECLK_STATUS 0xC05000B0
+# define ECLK_STATUS (1 << 0)
+
#define CG_SPLL_FUNC_CNTL 0xC0500140
#define SPLL_RESET (1 << 0)
#define SPLL_PWRON (1 << 1)