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authorAlex Deucher <alexander.deucher@amd.com>2013-04-05 18:28:08 +0400
committerAlex Deucher <alexander.deucher@amd.com>2013-04-09 18:23:50 +0400
commit7c1c7c18fc752b2a1d07597286467ef186312463 (patch)
tree9e66c767d5dd67f96109c7654f9d46ee33abdaf2 /drivers/gpu/drm/radeon/nid.h
parent9ed8b1f93ca3a274079cb36826af1331f83cd118 (diff)
downloadlinux-7c1c7c18fc752b2a1d07597286467ef186312463.tar.xz
drm/radeon/dce6: add missing display reg for tiling setup
A new tiling config register for the display blocks was added on DCE6. May fix: https://bugs.freedesktop.org/show_bug.cgi?id=62889 https://bugs.freedesktop.org/show_bug.cgi?id=57919 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu/drm/radeon/nid.h')
-rw-r--r--drivers/gpu/drm/radeon/nid.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/nid.h b/drivers/gpu/drm/radeon/nid.h
index 079dee202a9e..445b235c4323 100644
--- a/drivers/gpu/drm/radeon/nid.h
+++ b/drivers/gpu/drm/radeon/nid.h
@@ -45,6 +45,10 @@
#define ARUBA_GB_ADDR_CONFIG_GOLDEN 0x12010001
#define DMIF_ADDR_CONFIG 0xBD4
+
+/* DCE6 only */
+#define DMIF_ADDR_CALC 0xC00
+
#define SRBM_GFX_CNTL 0x0E44
#define RINGID(x) (((x) & 0x3) << 0)
#define VMID(x) (((x) & 0x7) << 0)