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authorChristian König <deathsimple@vodafone.de>2011-10-23 14:56:27 +0400
committerDave Airlie <airlied@redhat.com>2011-12-20 23:50:56 +0400
commite32eb50dbe43862606a51caa94368ec6bd019434 (patch)
treea064cf4e60c0d42694e5dcc3759794b4b24b8e77 /drivers/gpu/drm/radeon/r200.c
parentd6d2730c71a5d41a121a7b567bf7ff9c5d4cd3ab (diff)
downloadlinux-e32eb50dbe43862606a51caa94368ec6bd019434.tar.xz
drm/radeon: rename struct radeon_cp to radeon_ring
That naming seems to make more sense, since we not only want to run PM4 rings with it. Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r200.c')
-rw-r--r--drivers/gpu/drm/radeon/r200.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/drivers/gpu/drm/radeon/r200.c b/drivers/gpu/drm/radeon/r200.c
index d59c727a8e0f..eba4cbfa78f6 100644
--- a/drivers/gpu/drm/radeon/r200.c
+++ b/drivers/gpu/drm/radeon/r200.c
@@ -87,7 +87,7 @@ int r200_copy_dma(struct radeon_device *rdev,
unsigned num_gpu_pages,
struct radeon_fence *fence)
{
- struct radeon_cp *cp = &rdev->cp[RADEON_RING_TYPE_GFX_INDEX];
+ struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
uint32_t size;
uint32_t cur_size;
int i, num_loops;
@@ -96,33 +96,33 @@ int r200_copy_dma(struct radeon_device *rdev,
/* radeon pitch is /64 */
size = num_gpu_pages << RADEON_GPU_PAGE_SHIFT;
num_loops = DIV_ROUND_UP(size, 0x1FFFFF);
- r = radeon_ring_lock(rdev, cp, num_loops * 4 + 64);
+ r = radeon_ring_lock(rdev, ring, num_loops * 4 + 64);
if (r) {
DRM_ERROR("radeon: moving bo (%d).\n", r);
return r;
}
/* Must wait for 2D idle & clean before DMA or hangs might happen */
- radeon_ring_write(cp, PACKET0(RADEON_WAIT_UNTIL, 0));
- radeon_ring_write(cp, (1 << 16));
+ radeon_ring_write(ring, PACKET0(RADEON_WAIT_UNTIL, 0));
+ radeon_ring_write(ring, (1 << 16));
for (i = 0; i < num_loops; i++) {
cur_size = size;
if (cur_size > 0x1FFFFF) {
cur_size = 0x1FFFFF;
}
size -= cur_size;
- radeon_ring_write(cp, PACKET0(0x720, 2));
- radeon_ring_write(cp, src_offset);
- radeon_ring_write(cp, dst_offset);
- radeon_ring_write(cp, cur_size | (1 << 31) | (1 << 30));
+ radeon_ring_write(ring, PACKET0(0x720, 2));
+ radeon_ring_write(ring, src_offset);
+ radeon_ring_write(ring, dst_offset);
+ radeon_ring_write(ring, cur_size | (1 << 31) | (1 << 30));
src_offset += cur_size;
dst_offset += cur_size;
}
- radeon_ring_write(cp, PACKET0(RADEON_WAIT_UNTIL, 0));
- radeon_ring_write(cp, RADEON_WAIT_DMA_GUI_IDLE);
+ radeon_ring_write(ring, PACKET0(RADEON_WAIT_UNTIL, 0));
+ radeon_ring_write(ring, RADEON_WAIT_DMA_GUI_IDLE);
if (fence) {
r = radeon_fence_emit(rdev, fence);
}
- radeon_ring_unlock_commit(rdev, cp);
+ radeon_ring_unlock_commit(rdev, ring);
return r;
}