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authorAlex Deucher <alexdeucher@gmail.com>2010-05-20 20:04:59 +0400
committerDave Airlie <airlied@redhat.com>2010-08-02 04:00:01 +0400
commit40c4ac1c1931eb48ca0cf5e9ec464d13c5921994 (patch)
treef83bf40236519c2eef1fbefb561575aa62845384 /drivers/gpu/drm/radeon/r500_reg.h
parent21a8122ad38c60d73fe5dc51051414c3564d174a (diff)
downloadlinux-40c4ac1c1931eb48ca0cf5e9ec464d13c5921994.tar.xz
drm/radeon/kms: Add crtc tiling setup support for r6xx/r7xx
Needed for scanning out of a tiled buffer. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r500_reg.h')
-rw-r--r--drivers/gpu/drm/radeon/r500_reg.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/r500_reg.h b/drivers/gpu/drm/radeon/r500_reg.h
index 93c9a2bbccf8..6ac1f604e29b 100644
--- a/drivers/gpu/drm/radeon/r500_reg.h
+++ b/drivers/gpu/drm/radeon/r500_reg.h
@@ -386,6 +386,11 @@
# define AVIVO_D1GRPH_TILED (1 << 20)
# define AVIVO_D1GRPH_MACRO_ADDRESS_MODE (1 << 21)
+# define R600_D1GRPH_ARRAY_MODE_LINEAR_GENERAL (0 << 20)
+# define R600_D1GRPH_ARRAY_MODE_LINEAR_ALIGNED (1 << 20)
+# define R600_D1GRPH_ARRAY_MODE_1D_TILED_THIN1 (2 << 20)
+# define R600_D1GRPH_ARRAY_MODE_2D_TILED_THIN1 (4 << 20)
+
/* The R7xx *_HIGH surface regs are backwards; the D1 regs are in the D2
* block and vice versa. This applies to GRPH, CUR, etc.
*/