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authorAlex Deucher <alexander.deucher@amd.com>2013-05-06 19:31:04 +0400
committerAlex Deucher <alexander.deucher@amd.com>2013-08-31 00:30:17 +0400
commitef976ec4e2ae6d91a9aab5714071d1eed0115ed6 (patch)
treef13bc3f84f7f858e43e631529c60c060ffd918e6 /drivers/gpu/drm/radeon/radeon.h
parent9dd9333b2fac7b0ff00574693f3192926e3466fe (diff)
downloadlinux-ef976ec4e2ae6d91a9aab5714071d1eed0115ed6.tar.xz
drm/radeon/dpm: update cac leakage table parsing for CI
Uses a different table format if the board supports EVV. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon.h15
1 files changed, 11 insertions, 4 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index d1f5f7bb052c..3376107f3b1e 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1256,14 +1256,21 @@ struct radeon_clock_voltage_dependency_table {
struct radeon_clock_voltage_dependency_entry *entries;
};
-struct radeon_cac_leakage_entry {
- u16 vddc;
- u32 leakage;
+union radeon_cac_leakage_entry {
+ struct {
+ u16 vddc;
+ u32 leakage;
+ };
+ struct {
+ u16 vddc1;
+ u16 vddc2;
+ u16 vddc3;
+ };
};
struct radeon_cac_leakage_table {
u32 count;
- struct radeon_cac_leakage_entry *entries;
+ union radeon_cac_leakage_entry *entries;
};
struct radeon_phase_shedding_limits_entry {