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authorAlex Deucher <alexander.deucher@amd.com>2012-12-19 06:47:44 +0400
committerAlex Deucher <alexander.deucher@amd.com>2013-06-26 01:50:28 +0400
commit841cf442fd5326683db87e9e4f8050a47d2446da (patch)
treea08aa444db45478008720ae97f9bfee30d81a64e /drivers/gpu/drm/radeon/radeon_cs.c
parentbc8273fe97019e0cd1cdc893c6b40c0add7e8de3 (diff)
downloadlinux-841cf442fd5326683db87e9e4f8050a47d2446da.tar.xz
drm/radeon: Add CP init for CIK (v7)
Sets up the GFX ring and loads ucode for GFX and Compute. Todo: - handle compute queue setup. v2: add documentation v3: integrate with latest reset changes v4: additional init fixes v5: scratch reg write back no longer supported on CIK v6: properly set CP_RB0_BASE_HI v7: rebase Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_cs.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_cs.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c
index 7e265a58141f..cf71734a13d0 100644
--- a/drivers/gpu/drm/radeon/radeon_cs.c
+++ b/drivers/gpu/drm/radeon/radeon_cs.c
@@ -121,7 +121,9 @@ static int radeon_cs_get_ring(struct radeon_cs_parser *p, u32 ring, s32 priority
p->ring = RADEON_RING_TYPE_GFX_INDEX;
break;
case RADEON_CS_RING_COMPUTE:
- if (p->rdev->family >= CHIP_TAHITI) {
+ if (p->rdev->family >= CHIP_BONAIRE)
+ p->ring = RADEON_RING_TYPE_GFX_INDEX;
+ else if (p->rdev->family >= CHIP_TAHITI) {
if (p->priority > 0)
p->ring = CAYMAN_RING_TYPE_CP1_INDEX;
else