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authorDave Airlie <airlied@redhat.com>2009-07-09 09:04:19 +0400
committerDave Airlie <airlied@redhat.com>2009-07-15 11:13:06 +0400
commit4162338a1dab388474d4115289d1d7071623f04d (patch)
tree89a04cbcb53c273aeb5e3534bc2c93df41f54570 /drivers/gpu/drm/radeon/radeon_cursor.c
parent6cdf65855cf884712532fc72770baaef7bdf1b9a (diff)
downloadlinux-4162338a1dab388474d4115289d1d7071623f04d.tar.xz
drm/radeon/kms: set crtc and cursor offsets correctly on legacy chips.
The crtc and cursor offsets on the legacy chips are offset from DISPLAY_BASE_ADDR. The code worked if display base addr was at 0, but otherwise falls to pieces. Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_cursor.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_cursor.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_cursor.c b/drivers/gpu/drm/radeon/radeon_cursor.c
index 5232441f119b..5f8ce370c4f8 100644
--- a/drivers/gpu/drm/radeon/radeon_cursor.c
+++ b/drivers/gpu/drm/radeon/radeon_cursor.c
@@ -113,7 +113,7 @@ static void radeon_set_cursor(struct drm_crtc *crtc, struct drm_gem_object *obj,
WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr);
else
/* offset is from DISP(2)_BASE_ADDRESS */
- WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, gpu_addr);
+ WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, (gpu_addr-radeon_crtc->legacy_display_base_addr));
}
int radeon_crtc_cursor_set(struct drm_crtc *crtc,