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| author | Alex Deucher <alexander.deucher@amd.com> | 2013-04-05 18:28:08 +0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2013-04-09 18:23:50 +0400 |
| commit | 7c1c7c18fc752b2a1d07597286467ef186312463 (patch) | |
| tree | 9e66c767d5dd67f96109c7654f9d46ee33abdaf2 /drivers/gpu/drm/radeon/si.c | |
| parent | 9ed8b1f93ca3a274079cb36826af1331f83cd118 (diff) | |
| download | linux-7c1c7c18fc752b2a1d07597286467ef186312463.tar.xz | |
drm/radeon/dce6: add missing display reg for tiling setup
A new tiling config register for the display blocks was
added on DCE6.
May fix:
https://bugs.freedesktop.org/show_bug.cgi?id=62889
https://bugs.freedesktop.org/show_bug.cgi?id=57919
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu/drm/radeon/si.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/si.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 862b52c69882..ace45da91434 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c @@ -1765,6 +1765,7 @@ static void si_gpu_init(struct radeon_device *rdev) WREG32(GB_ADDR_CONFIG, gb_addr_config); WREG32(DMIF_ADDR_CONFIG, gb_addr_config); + WREG32(DMIF_ADDR_CALC, gb_addr_config); WREG32(HDP_ADDR_CONFIG, gb_addr_config); WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config); WREG32(DMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config); |