diff options
| author | Christian König <christian.koenig@amd.com> | 2013-04-25 11:02:14 +0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2014-08-27 20:47:56 +0400 |
| commit | 115365e8a33e4ce5e12bee7999568a26b4c33d3f (patch) | |
| tree | 39eb5e16a704be6f5fe5121485de3bde2228a60d /drivers/gpu/drm/radeon/uvd_v1_0.c | |
| parent | 856754c3a23a622d26a82b29fab6429481705511 (diff) | |
| download | linux-115365e8a33e4ce5e12bee7999568a26b4c33d3f.tar.xz | |
drm/radeon: implement UVD hw workarounds for R6xx v3
Only the essentials, cause this hw generation is really buggy.
v2: start supporting RV670,RV620 and RV635 as well
v3: activate more workarounds
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/uvd_v1_0.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/uvd_v1_0.c | 26 |
1 files changed, 25 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/uvd_v1_0.c b/drivers/gpu/drm/radeon/uvd_v1_0.c index 62d7086f0e08..c3e182bc6c59 100644 --- a/drivers/gpu/drm/radeon/uvd_v1_0.c +++ b/drivers/gpu/drm/radeon/uvd_v1_0.c @@ -207,8 +207,32 @@ done: /* lower clocks again */ radeon_set_uvd_clocks(rdev, 0, 0); - if (!r) + if (!r) { + switch (rdev->family) { + case CHIP_RV610: + case CHIP_RV630: + case CHIP_RV620: + /* 64byte granularity workaround */ + WREG32(MC_CONFIG, 0); + WREG32(MC_CONFIG, 1 << 4); + WREG32(RS_DQ_RD_RET_CONF, 0x3f); + WREG32(MC_CONFIG, 0x1f); + + /* fall through */ + case CHIP_RV670: + case CHIP_RV635: + + /* write clean workaround */ + WREG32_P(UVD_VCPU_CNTL, 0x10, ~0x10); + break; + + default: + /* TODO: Do we need more? */ + break; + } + DRM_INFO("UVD initialized successfully.\n"); + } return r; } |