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authorChristian König <christian.koenig@amd.com>2013-09-23 11:42:32 +0400
committerAlex Deucher <alexander.deucher@amd.com>2013-09-23 19:00:12 +0400
commit4b40e5921230beb1951f04d2b1b92c4c88fbad43 (patch)
tree1cf9204fee5306f2f3ce430ff5e8d5c400ffd7dd /drivers/gpu/drm/radeon/uvd_v1_0.c
parent4a1132a023eb48cf10522d84c5908d43b612c041 (diff)
downloadlinux-4b40e5921230beb1951f04d2b1b92c4c88fbad43.tar.xz
drm/radeon/uvd: lower msg&fb buffer requirements on UVD3
Starting with UVD3 message and feedback buffers have their own 256MB segment, so no need to force them into VRAM any more. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/uvd_v1_0.c')
-rw-r--r--drivers/gpu/drm/radeon/uvd_v1_0.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/uvd_v1_0.c b/drivers/gpu/drm/radeon/uvd_v1_0.c
index 7266805d9786..3100fa9cb52f 100644
--- a/drivers/gpu/drm/radeon/uvd_v1_0.c
+++ b/drivers/gpu/drm/radeon/uvd_v1_0.c
@@ -212,8 +212,8 @@ int uvd_v1_0_start(struct radeon_device *rdev)
/* enable VCPU clock */
WREG32(UVD_VCPU_CNTL, 1 << 9);
- /* enable UMC */
- WREG32_P(UVD_LMI_CTRL2, 0, ~(1 << 8));
+ /* enable UMC and NC0 */
+ WREG32_P(UVD_LMI_CTRL2, 1 << 13, ~((1 << 8) | (1 << 13)));
/* boot up the VCPU */
WREG32(UVD_SOFT_RESET, 0);