diff options
author | Biju Das <biju.das.jz@bp.renesas.com> | 2024-02-18 19:48:38 +0300 |
---|---|---|
committer | Maxime Ripard <mripard@kernel.org> | 2024-02-21 19:21:21 +0300 |
commit | 768e9e61b3b99191d8fe1aead6e71f551738b5c4 (patch) | |
tree | 9d6195804581194c1778059ae8f4b6fa6ad76029 /drivers/gpu/drm/renesas/rz-du/rzg2l_du_encoder.h | |
parent | ac23216bb1f5caa5ae6f3ac70aa7f78a5b50f88d (diff) | |
download | linux-768e9e61b3b99191d8fe1aead6e71f551738b5c4.tar.xz |
drm: renesas: Add RZ/G2L DU Support
The LCD controller is composed of Frame Compression Processor (FCPVD),
Video Signal Processor (VSPD), and Display Unit (DU).
It has DPI/DSI interfaces and supports a maximum resolution of 1080p
along with 2 RPFs to support the blending of two picture layers and
raster operations (ROPs).
The DU module is connected to VSPD. Add RZ/G2L DU support for RZ/G2L
alike SoCs.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20240218164840.57662-4-biju.das.jz@bp.renesas.com
Signed-off-by: Maxime Ripard <mripard@kernel.org>
Diffstat (limited to 'drivers/gpu/drm/renesas/rz-du/rzg2l_du_encoder.h')
-rw-r--r-- | drivers/gpu/drm/renesas/rz-du/rzg2l_du_encoder.h | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_encoder.h b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_encoder.h new file mode 100644 index 000000000000..3e430c1f6132 --- /dev/null +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_encoder.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * RZ/G2L Display Unit Encoder + * + * Copyright (C) 2023 Renesas Electronics Corporation + * + * Based on rcar_du_encoder.h + */ + +#ifndef __RZG2L_DU_ENCODER_H__ +#define __RZG2L_DU_ENCODER_H__ + +#include <drm/drm_encoder.h> +#include <linux/container_of.h> + +struct rzg2l_du_device; + +struct rzg2l_du_encoder { + struct drm_encoder base; + enum rzg2l_du_output output; +}; + +static inline struct rzg2l_du_encoder *to_rzg2l_encoder(struct drm_encoder *e) +{ + return container_of(e, struct rzg2l_du_encoder, base); +} + +int rzg2l_du_encoder_init(struct rzg2l_du_device *rcdu, + enum rzg2l_du_output output, + struct device_node *enc_node); + +#endif /* __RZG2L_DU_ENCODER_H__ */ |