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author | Yannick Fertre <yannick.fertre@foss.st.com> | 2022-06-03 16:46:54 +0300 |
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committer | Philippe Cornu <philippe.cornu@foss.st.com> | 2022-06-27 17:01:50 +0300 |
commit | 7d008eecb0cfc2b1a1a742d6faa0a02f339535c2 (patch) | |
tree | 5161577c7a10d6c0efd373339f167464a544aa65 /drivers/gpu/drm/stm/ltdc.h | |
parent | c6193dc57f74bc626c02a9880b921a7f124e1456 (diff) | |
download | linux-7d008eecb0cfc2b1a1a742d6faa0a02f339535c2.tar.xz |
drm/stm: ltdc: update hardware error management
The latest hardware version (0x40100) supports a hardware threshold
register (aka FUTR) to trigger a fifo underrun interrupt.
A software threshold has been implemented for other hardware versions.
The threshold is set to 128 by default.
Signed-off-by: Yannick Fertre <yannick.fertre@foss.st.com>
Signed-off-by: Philippe Cornu <philippe.cornu@foss.st.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220603134654.594373-1-yannick.fertre@foss.st.com
Diffstat (limited to 'drivers/gpu/drm/stm/ltdc.h')
-rw-r--r-- | drivers/gpu/drm/stm/ltdc.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/stm/ltdc.h b/drivers/gpu/drm/stm/ltdc.h index 15139980d8ea..9d488043ffdb 100644 --- a/drivers/gpu/drm/stm/ltdc.h +++ b/drivers/gpu/drm/stm/ltdc.h @@ -30,6 +30,7 @@ struct ltdc_caps { bool crc; /* cyclic redundancy check supported */ bool dynamic_zorder; /* dynamic z-order */ bool plane_rotation; /* plane rotation */ + bool fifo_threshold; /* fifo underrun threshold supported */ }; #define LTDC_MAX_LAYER 4 @@ -45,8 +46,11 @@ struct ltdc_device { struct clk *pixel_clk; /* lcd pixel clock */ struct mutex err_lock; /* protecting error_status */ struct ltdc_caps caps; - u32 error_status; u32 irq_status; + u32 fifo_err; /* fifo underrun error counter */ + u32 fifo_warn; /* fifo underrun warning counter */ + u32 fifo_threshold; /* fifo underrun threshold */ + u32 transfer_err; /* transfer error counter */ struct fps_info plane_fpsi[LTDC_MAX_LAYER]; struct drm_atomic_state *suspend_state; int crc_skip_count; |