diff options
| author | Thierry Reding <treding@nvidia.com> | 2018-02-05 16:07:57 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2019-10-28 13:18:45 +0300 |
| commit | 6c651b13e436030f996bcfb2f76833af94e44531 (patch) | |
| tree | 4f59b6ab85934648b9171052e85346436f6189dc /drivers/gpu/drm/tegra/dp.c | |
| parent | db199502fa8b62afddde5379d94cac0439202111 (diff) | |
| download | linux-6c651b13e436030f996bcfb2f76833af94e44531.tar.xz | |
drm/tegra: dp: Read channel coding capability from sink
Parse from the sink capabilities whether or not it supports ANSI 8B/10B
channel coding as specified in ANSI X3.230-1994, clause 11.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/dp.c')
| -rw-r--r-- | drivers/gpu/drm/tegra/dp.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/tegra/dp.c b/drivers/gpu/drm/tegra/dp.c index e22ebab677b9..0bd87cff4575 100644 --- a/drivers/gpu/drm/tegra/dp.c +++ b/drivers/gpu/drm/tegra/dp.c @@ -13,6 +13,7 @@ static void drm_dp_link_caps_reset(struct drm_dp_link_caps *caps) caps->enhanced_framing = false; caps->tps3_supported = false; caps->fast_training = false; + caps->channel_coding = false; } void drm_dp_link_caps_copy(struct drm_dp_link_caps *dest, @@ -21,6 +22,7 @@ void drm_dp_link_caps_copy(struct drm_dp_link_caps *dest, dest->enhanced_framing = src->enhanced_framing; dest->tps3_supported = src->tps3_supported; dest->fast_training = src->fast_training; + dest->channel_coding = src->channel_coding; } static void drm_dp_link_reset(struct drm_dp_link *link) @@ -67,6 +69,7 @@ int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link) link->caps.enhanced_framing = drm_dp_enhanced_frame_cap(dpcd); link->caps.tps3_supported = drm_dp_tps3_supported(dpcd); link->caps.fast_training = drm_dp_fast_training_cap(dpcd); + link->caps.channel_coding = drm_dp_channel_coding_supported(dpcd); link->rate = link->max_rate; link->lanes = link->max_lanes; |