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| author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2020-08-12 14:26:25 +0300 |
|---|---|---|
| committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2020-08-21 15:17:05 +0300 |
| commit | 8b87014f23e4890fe12547530ef3008e70abf593 (patch) | |
| tree | e66a2d2c0aac5048dc797935b786bf8e00260754 /drivers/gpu/drm/tidss/tidss_dispc.h | |
| parent | 227c6d109ce50e318ef37bf5c1ce31d3daab1db1 (diff) | |
| download | linux-8b87014f23e4890fe12547530ef3008e70abf593.tar.xz | |
drm/tidss: implement WA for AM65xx erratum i2000
This patch implements WA for AM65xx erratum i2000, which causes YUV
formats to show wrong colors.
An earlier patch removed a partial WA:
a8d9d7da1546349f18eb2d6b6b3a04bdeb38719d ("drm/tidss: remove AM65x PG1 YUV erratum code")
The patch explains the reasoning for removal. The change in plans has
been that it has become clear that there are and will be users for PG1
SoCs and as such it's good to implement the WA for PG1s.
This patch adds the WA back so that it is only used on SR1.0 (which is
the new name for PG1). The previous WA code didn't check the SoC
revision, which this patch does.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200812112625.59897-1-tomi.valkeinen@ti.com
Reviewed-by: Jyri Sarha <jsarha@ti.com>
Diffstat (limited to 'drivers/gpu/drm/tidss/tidss_dispc.h')
| -rw-r--r-- | drivers/gpu/drm/tidss/tidss_dispc.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/tidss/tidss_dispc.h b/drivers/gpu/drm/tidss/tidss_dispc.h index 5984e0de2cd9..e49432f0abf5 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.h +++ b/drivers/gpu/drm/tidss/tidss_dispc.h @@ -46,6 +46,10 @@ struct dispc_features_scaling { u32 xinc_max; }; +struct dispc_errata { + bool i2000; /* DSS Does Not Support YUV Pixel Data Formats */ +}; + enum dispc_vp_bus_type { DISPC_VP_DPI, /* DPI output */ DISPC_VP_OLDI, /* OLDI (LVDS) output */ |