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| author | Eric Anholt <eric@anholt.net> | 2019-04-19 03:10:12 +0300 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2019-05-16 19:24:34 +0300 |
| commit | 091d62831793c3a1be6ae46aa888e7551e0818ad (patch) | |
| tree | 6edbc04b4f09d47742a6971d2ea17d9748a0f2ec /drivers/gpu/drm/v3d/v3d_regs.h | |
| parent | 145986ec566b002359243702962b917e7506d44b (diff) | |
| download | linux-091d62831793c3a1be6ae46aa888e7551e0818ad.tar.xz | |
drm/v3d: Set the correct DMA mask according to the MMU's limits.
On 7278, we've got 40 bits to work with.
Signed-off-by: Eric Anholt <eric@anholt.net>
Link: https://patchwork.freedesktop.org/patch/msgid/20190419001014.23579-2-eric@anholt.net
Reviewed-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Diffstat (limited to 'drivers/gpu/drm/v3d/v3d_regs.h')
| -rw-r--r-- | drivers/gpu/drm/v3d/v3d_regs.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/v3d/v3d_regs.h b/drivers/gpu/drm/v3d/v3d_regs.h index 9a8ff0ce648e..54c8c4320da0 100644 --- a/drivers/gpu/drm/v3d/v3d_regs.h +++ b/drivers/gpu/drm/v3d/v3d_regs.h @@ -191,6 +191,14 @@ /* Address that faulted */ #define V3D_MMU_VIO_ADDR 0x01234 +#define V3D_MMU_DEBUG_INFO 0x01238 +# define V3D_MMU_PA_WIDTH_MASK V3D_MASK(11, 8) +# define V3D_MMU_PA_WIDTH_SHIFT 8 +# define V3D_MMU_VA_WIDTH_MASK V3D_MASK(7, 4) +# define V3D_MMU_VA_WIDTH_SHIFT 4 +# define V3D_MMU_VERSION_MASK V3D_MASK(3, 0) +# define V3D_MMU_VERSION_SHIFT 0 + /* Per-V3D-core registers */ #define V3D_CTL_IDENT0 0x00000 |