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authorEric Anholt <eric@anholt.net>2019-02-21 02:36:57 +0300
committerEric Anholt <eric@anholt.net>2019-03-08 19:59:25 +0300
commita7dde1b7a5c9adf13d422240d02b812952660a35 (patch)
tree1d56ce05f44c2bb767f9a8126506a549aef9cfa8 /drivers/gpu/drm/v3d
parentd26f9c7f888d362f3ecd3ef029456b64b30a9164 (diff)
downloadlinux-a7dde1b7a5c9adf13d422240d02b812952660a35.tar.xz
drm/v3d: Don't try to set OVRTMUOUT on V3D 4.x.
The old field is gone and the register now has a different field, QRMAXCNT for how many TMU requests get serviced before thread switch. We were accidentally reducing it from its default of 0x3 (4 requests) to 0x0 (1). v2: Skip setting the reg at all on 4.x, instead of trying to update only the old field. Signed-off-by: Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20190220233658.986-2-eric@anholt.net Reviewed-by: Dave Emett <david.emett@broadcom.com>
Diffstat (limited to 'drivers/gpu/drm/v3d')
-rw-r--r--drivers/gpu/drm/v3d/v3d_gem.c3
-rw-r--r--drivers/gpu/drm/v3d/v3d_regs.h2
2 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/v3d/v3d_gem.c b/drivers/gpu/drm/v3d/v3d_gem.c
index 0d1e5e0b8042..0a83268dec0c 100644
--- a/drivers/gpu/drm/v3d/v3d_gem.c
+++ b/drivers/gpu/drm/v3d/v3d_gem.c
@@ -24,7 +24,8 @@ v3d_init_core(struct v3d_dev *v3d, int core)
* type. If you want the default behavior, you can still put
* "2" in the indirect texture state's output_type field.
*/
- V3D_CORE_WRITE(core, V3D_CTL_MISCCFG, V3D_MISCCFG_OVRTMUOUT);
+ if (v3d->ver < 40)
+ V3D_CORE_WRITE(core, V3D_CTL_MISCCFG, V3D_MISCCFG_OVRTMUOUT);
/* Whenever we flush the L2T cache, we always want to flush
* the whole thing.
diff --git a/drivers/gpu/drm/v3d/v3d_regs.h b/drivers/gpu/drm/v3d/v3d_regs.h
index 6ccdee9d47bd..8e88af237610 100644
--- a/drivers/gpu/drm/v3d/v3d_regs.h
+++ b/drivers/gpu/drm/v3d/v3d_regs.h
@@ -216,6 +216,8 @@
# define V3D_IDENT2_BCG_INT BIT(28)
#define V3D_CTL_MISCCFG 0x00018
+# define V3D_CTL_MISCCFG_QRMAXCNT_MASK V3D_MASK(3, 1)
+# define V3D_CTL_MISCCFG_QRMAXCNT_SHIFT 1
# define V3D_MISCCFG_OVRTMUOUT BIT(0)
#define V3D_CTL_L2CACTL 0x00020