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authorZack Rusin <zackr@vmware.com>2021-11-10 17:50:34 +0300
committerZack Rusin <zackr@vmware.com>2021-12-01 19:58:37 +0300
commit2696f9010d21aee60be06b2135806e11c79ded8b (patch)
tree8528e383628bd1e66e2dedbfdeea299beae3b97f /drivers/gpu/drm/vgem
parenta85b1cb23091d3112492f30fd92308cf4dcc4fc6 (diff)
downloadlinux-2696f9010d21aee60be06b2135806e11c79ded8b.tar.xz
drm/ttm: Clarify that the TTM_PL_SYSTEM is under TTMs control
TTM takes full control over TTM_PL_SYSTEM placed buffers. This makes driver internal usage of TTM_PL_SYSTEM prone to errors because it requires the drivers to manually handle all interactions between TTM which can swap out those buffers whenever it thinks it's the right thing to do and driver. CPU buffers which need to be fenced and shared with accelerators should be placed in driver specific placements that can explicitly handle CPU/accelerator buffer fencing. Currently, apart, from things silently failing nothing is enforcing that requirement which means that it's easy for drivers and new developers to get this wrong. To avoid the confusion we can document this requirement and clarify the solution. This came up during a discussion on dri-devel: https://lore.kernel.org/dri-devel/232f45e9-8748-1243-09bf-56763e6668b3@amd.com Signed-off-by: Zack Rusin <zackr@vmware.com> Cc: Christian König <christian.koenig@amd.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211110145034.487512-1-zackr@vmware.com
Diffstat (limited to 'drivers/gpu/drm/vgem')
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