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| author | Michal Wajdeczko <michal.wajdeczko@intel.com> | 2024-03-14 20:31:27 +0300 |
|---|---|---|
| committer | Michał Winiarski <michal.winiarski@intel.com> | 2024-03-16 00:20:14 +0300 |
| commit | cfe7267ef14bb2b658c135af504b0aa46ff8e9ab (patch) | |
| tree | 7dc39180e747f79d6cf627520d14a95f3fe7efaa /drivers/gpu/drm/xe/regs | |
| parent | 5a9481a86b7448d600829e6f14205a241a23a03c (diff) | |
| download | linux-cfe7267ef14bb2b658c135af504b0aa46ff8e9ab.tar.xz | |
drm/xe: Mark VF accessible GuC registers
Only selected registers are available for Virtual Functions.
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240314173130.1177-4-michal.wajdeczko@intel.com
Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/regs')
| -rw-r--r-- | drivers/gpu/drm/xe/regs/xe_guc_regs.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/xe/regs/xe_guc_regs.h b/drivers/gpu/drm/xe/regs/xe_guc_regs.h index 4e7f809d2b00..11682e675e0f 100644 --- a/drivers/gpu/drm/xe/regs/xe_guc_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_guc_regs.h @@ -100,14 +100,14 @@ #define GT_PM_CONFIG XE_REG(0x13816c) #define GT_DOORBELL_ENABLE REG_BIT(0) -#define GUC_HOST_INTERRUPT XE_REG(0x1901f0) +#define GUC_HOST_INTERRUPT XE_REG(0x1901f0, XE_REG_OPTION_VF) -#define VF_SW_FLAG(n) XE_REG(0x190240 + (n) * 4) +#define VF_SW_FLAG(n) XE_REG(0x190240 + (n) * 4, XE_REG_OPTION_VF) #define VF_SW_FLAG_COUNT 4 -#define MED_GUC_HOST_INTERRUPT XE_REG(0x190304) +#define MED_GUC_HOST_INTERRUPT XE_REG(0x190304, XE_REG_OPTION_VF) -#define MED_VF_SW_FLAG(n) XE_REG(0x190310 + (n) * 4) +#define MED_VF_SW_FLAG(n) XE_REG(0x190310 + (n) * 4, XE_REG_OPTION_VF) #define MED_VF_SW_FLAG_COUNT 4 #define GUC_TLB_INV_CR XE_REG(0xcee8) |