diff options
| author | Matt Roper <matthew.d.roper@intel.com> | 2023-06-02 00:52:19 +0300 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-20 02:34:11 +0300 |
| commit | 3b0d4a5579968f1c42044142a4997bab9fe7ffed (patch) | |
| tree | c8351f2fe7c3e997bc555ce935158b76a4f5a305 /drivers/gpu/drm/xe/xe_ggtt.c | |
| parent | 3643e6371542cc4782d3700f07130c9d250666d8 (diff) | |
| download | linux-3b0d4a5579968f1c42044142a4997bab9fe7ffed.tar.xz | |
drm/xe: Move register MMIO into xe_tile
Each tile has its own register region in the BAR, containing instances
of all registers for the platform. In contrast, the multiple GTs within
a tile share the same MMIO space; there's just a small subset of
registers (the GSI registers) which have multiple copies at different
offsets (0x0 for primary GT, 0x380000 for media GT). Move the register
MMIO region size/pointers to the tile structure, leaving just the GSI
offset information in the GT structure.
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20230601215244.678611-7-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_ggtt.c')
| -rw-r--r-- | drivers/gpu/drm/xe/xe_ggtt.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c index 4eefb2b3166c..cd8ada94e688 100644 --- a/drivers/gpu/drm/xe/xe_ggtt.c +++ b/drivers/gpu/drm/xe/xe_ggtt.c @@ -93,6 +93,7 @@ static void ggtt_fini_noalloc(struct drm_device *drm, void *arg) int xe_ggtt_init_noalloc(struct xe_gt *gt, struct xe_ggtt *ggtt) { struct xe_device *xe = gt_to_xe(gt); + struct xe_tile *tile = gt_to_tile(gt); struct pci_dev *pdev = to_pci_dev(xe->drm.dev); unsigned int gsm_size; @@ -106,7 +107,7 @@ int xe_ggtt_init_noalloc(struct xe_gt *gt, struct xe_ggtt *ggtt) return -ENOMEM; } - ggtt->gsm = gt->mmio.regs + SZ_8M; + ggtt->gsm = tile->mmio.regs + SZ_8M; ggtt->size = (gsm_size / 8) * (u64) XE_PAGE_SIZE; if (IS_DGFX(xe) && xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K) |