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authorLucas De Marchi <lucas.demarchi@intel.com>2022-12-22 23:11:45 +0300
committerRodrigo Vivi <rodrigo.vivi@intel.com>2023-12-12 22:06:00 +0300
commit4aa18ae44686144c5c5d29113d6e2c5c3ebb349d (patch)
tree37ebc3f0066a116bb76f9d897f6af8c197b92c83 /drivers/gpu/drm/xe/xe_ggtt.c
parent760f168db30a5c06893e87c88f25cd3578a8453a (diff)
downloadlinux-4aa18ae44686144c5c5d29113d6e2c5c3ebb349d.tar.xz
drm/xe/ggtt: Use BIT_ULL() for 64bit
Make sure it's 64bit value in both 32b and 64b arch. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_ggtt.c')
-rw-r--r--drivers/gpu/drm/xe/xe_ggtt.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index eab74a509f68..0018c8441747 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -20,8 +20,8 @@
#include "gt/intel_gt_regs.h"
/* FIXME: Common file, preferably auto-gen */
-#define MTL_GGTT_PTE_PAT0 BIT(52)
-#define MTL_GGTT_PTE_PAT1 BIT(53)
+#define MTL_GGTT_PTE_PAT0 BIT_ULL(52)
+#define MTL_GGTT_PTE_PAT1 BIT_ULL(53)
u64 xe_ggtt_pte_encode(struct xe_bo *bo, u64 bo_offset)
{