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authorMatthew Brost <matthew.brost@intel.com>2023-11-06 21:39:38 +0300
committerRodrigo Vivi <rodrigo.vivi@intel.com>2023-12-21 19:43:39 +0300
commita839e365ac88f0fa9f8c7ae92b9e7e66bbd9e4d7 (patch)
tree3ccc4f1b6af99f72c9c64c257a6d3f29445cceca /drivers/gpu/drm/xe/xe_guc_types.h
parent43efd3ba9f44c46fdb31c8b0f257cf9a2d1b58ae (diff)
downloadlinux-a839e365ac88f0fa9f8c7ae92b9e7e66bbd9e4d7.tar.xz
drm/xe: Use pool of ordered wq for GuC submission
To appease lockdep, use a pool of ordered wq for GuC submission rather tha leaving the ordered wq allocation to the drm sched. Without this change eventually lockdep runs out of hash entries (MAX_LOCKDEP_CHAINS is exceeded) as each user allocated exec queue adds more hash table entries to lockdep. A pool old of 256 ordered wq should be enough to have similar behavior with and without lockdep enabled. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_guc_types.h')
-rw-r--r--drivers/gpu/drm/xe/xe_guc_types.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/xe/xe_guc_types.h b/drivers/gpu/drm/xe/xe_guc_types.h
index a5e58917a499..0fdcc05dc16a 100644
--- a/drivers/gpu/drm/xe/xe_guc_types.h
+++ b/drivers/gpu/drm/xe/xe_guc_types.h
@@ -61,6 +61,13 @@ struct xe_guc {
/** @patch: patch version of GuC submission */
u32 patch;
} version;
+#ifdef CONFIG_PROVE_LOCKING
+#define NUM_SUBMIT_WQ 256
+ /** @submit_wq_pool: submission ordered workqueues pool */
+ struct workqueue_struct *submit_wq_pool[NUM_SUBMIT_WQ];
+ /** @submit_wq_idx: submission ordered workqueue index */
+ int submit_wq_idx;
+#endif
/** @enabled: submission is enabled */
bool enabled;
} submission_state;