diff options
| author | Lucas De Marchi <lucas.demarchi@intel.com> | 2023-05-26 19:43:39 +0300 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-20 02:34:01 +0300 |
| commit | 72906d340b60f3dae545deef77376a0f598bece7 (patch) | |
| tree | 9c138c8196ad81402804fcbf5ecbccc102a2f212 /drivers/gpu/drm/xe/xe_hw_engine.c | |
| parent | a9bd807eb16be11e11f6c6d3921119381cc43135 (diff) | |
| download | linux-72906d340b60f3dae545deef77376a0f598bece7.tar.xz | |
drm/xe/rtp: Split rtp process initialization
The selection between hwe and gt is exposed to the outside of rtp, by
the xe_rtp_process() function. However it doesn't make seense from the
caller point of view to pass a hwe and a gt as argument since the gt
should always be the one containing the hwe.
This clarifies the interface by separating the context creation into an
initializer. The initializer then passes the correct value and there
should never be a case with hwe and gt set: when hwe is passed, the gt
is the one containing it. Internally the functions continue receiving
the argument separately.
v2: Leave the device-only context to a separate patch if they are indeed
needed later
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20230526164358.86393-3-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_hw_engine.c')
| -rw-r--r-- | drivers/gpu/drm/xe/xe_hw_engine.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c index 71ac4defb947..25b96f40d5a7 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine.c +++ b/drivers/gpu/drm/xe/xe_hw_engine.c @@ -281,6 +281,7 @@ xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe) const u8 mocs_read_idx = gt->mocs.uc_index; u32 blit_cctl_val = REG_FIELD_PREP(BLIT_CCTL_DST_MOCS_MASK, mocs_write_idx) | REG_FIELD_PREP(BLIT_CCTL_SRC_MOCS_MASK, mocs_read_idx); + struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(hwe); const struct xe_rtp_entry lrc_was[] = { /* * Some blitter commands do not have a field for MOCS, those @@ -299,7 +300,7 @@ xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe) {} }; - xe_rtp_process(lrc_was, &hwe->reg_lrc, gt, hwe); + xe_rtp_process(&ctx, lrc_was, &hwe->reg_lrc); } static void @@ -311,7 +312,8 @@ hw_engine_setup_default_state(struct xe_hw_engine *hwe) const u8 mocs_read_idx = gt->mocs.uc_index; u32 ring_cmd_cctl_val = REG_FIELD_PREP(CMD_CCTL_WRITE_OVERRIDE_MASK, mocs_write_idx) | REG_FIELD_PREP(CMD_CCTL_READ_OVERRIDE_MASK, mocs_read_idx); - const struct xe_rtp_entry engine_was[] = { + struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(hwe); + const struct xe_rtp_entry engine_entries[] = { /* * RING_CMD_CCTL specifies the default MOCS entry that will be * used by the command streamer when executing commands that @@ -332,7 +334,7 @@ hw_engine_setup_default_state(struct xe_hw_engine *hwe) {} }; - xe_rtp_process(engine_was, &hwe->reg_sr, gt, hwe); + xe_rtp_process(&ctx, engine_entries, &hwe->reg_sr); } static void hw_engine_init_early(struct xe_gt *gt, struct xe_hw_engine *hwe, |