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| author | José Roberto de Souza <jose.souza@intel.com> | 2023-10-03 23:16:28 +0300 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-21 19:42:09 +0300 |
| commit | d32c49e318df0a3f334c2d2ff95ce4600df2d6bf (patch) | |
| tree | 3ad1987b45bb5d23249fa63da06db644a4bef422 /drivers/gpu/drm/xe/xe_hw_engine.c | |
| parent | f24cf6cea519cd5c8110ac8dcbdad70e9f2dfb22 (diff) | |
| download | linux-d32c49e318df0a3f334c2d2ff95ce4600df2d6bf.tar.xz | |
drm/xe: Fix devcoredump readout of IPEHR
It was reading (base) + 0x8c but that is not a valid register
and instead it should read (base) + 0x68.
So here reading the correct register and removing the wrong and
duplicated.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_hw_engine.c')
| -rw-r--r-- | drivers/gpu/drm/xe/xe_hw_engine.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c index dc9dd83d99c5..c2db391cf267 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine.c +++ b/drivers/gpu/drm/xe/xe_hw_engine.c @@ -728,7 +728,7 @@ xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe) snapshot->reg.ring_dma_fadd = hw_engine_mmio_read32(hwe, RING_DMA_FADD(0)); snapshot->reg.ipeir = hw_engine_mmio_read32(hwe, IPEIR(0)); - snapshot->reg.ipehr = hw_engine_mmio_read32(hwe, IPEHR(0)); + snapshot->reg.ipehr = hw_engine_mmio_read32(hwe, RING_IPEHR(0)); if (snapshot->class == XE_ENGINE_CLASS_COMPUTE) snapshot->reg.rcu_mode = xe_mmio_read32(hwe->gt, RCU_MODE); |