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| author | Matt Roper <matthew.d.roper@intel.com> | 2023-10-16 19:34:54 +0300 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-21 19:43:00 +0300 |
| commit | 0134f130e76ad6e323e15ccb00624586c8763075 (patch) | |
| tree | 3b25773b659f84ab336a48d2a0a580bef9a9a9f6 /drivers/gpu/drm/xe/xe_ring_ops.c | |
| parent | 14a1e6a4a460fceae50fc1cf6b50d36c4ba96a7b (diff) | |
| download | linux-0134f130e76ad6e323e15ccb00624586c8763075.tar.xz | |
drm/xe: Extract MI_* instructions to their own header
Extracting the common MI_* instructions that can be used with any engine
to their own header will make it easier as we add additional engine
instructions in upcoming patches.
Also, since the majority of GPU instructions (both MI and non-MI) have
a "length" field in bits 7:0 of the instruction header, a common define
is added for that. Instruction-specific length fields are still defined
for special case instructions that have larger/smaller length fields.
v2:
- Use "instr" instead of "inst" as the short form of "instruction"
everywhere. (Lucas)
- Include xe_reg_defs.h instead of the i915 compat header. (Lucas)
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20231016163449.1300701-12-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_ring_ops.c')
| -rw-r--r-- | drivers/gpu/drm/xe/xe_ring_ops.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c index da13cc7ba6af..58676f4b989f 100644 --- a/drivers/gpu/drm/xe/xe_ring_ops.c +++ b/drivers/gpu/drm/xe/xe_ring_ops.c @@ -6,6 +6,7 @@ #include "xe_ring_ops.h" #include "generated/xe_wa_oob.h" +#include "instructions/xe_mi_commands.h" #include "regs/xe_gpu_commands.h" #include "regs/xe_gt_regs.h" #include "regs/xe_lrc_layout.h" @@ -91,7 +92,7 @@ static int emit_flush_imm_ggtt(u32 addr, u32 value, bool invalidate_tlb, static int emit_bb_start(u64 batch_addr, u32 ppgtt_flag, u32 *dw, int i) { - dw[i++] = MI_BATCH_BUFFER_START | ppgtt_flag; + dw[i++] = MI_BATCH_BUFFER_START | ppgtt_flag | XE_INSTR_NUM_DW(3); dw[i++] = lower_32_bits(batch_addr); dw[i++] = upper_32_bits(batch_addr); |