diff options
| author | Lucas De Marchi <lucas.demarchi@intel.com> | 2023-01-26 10:33:38 +0300 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-20 02:28:13 +0300 |
| commit | 844c0700a675a5e30644c867ae7b30cb680d176d (patch) | |
| tree | 4720ce27599935215d9eb398f71ae6b7ab8ac779 /drivers/gpu/drm/xe/xe_rtp.c | |
| parent | 944a5e993a3e8a54ec56feec3253bb6b6f5c90d7 (diff) | |
| download | linux-844c0700a675a5e30644c867ae7b30cb680d176d.tar.xz | |
drm/xe/rtp: Support multiple actions per entry
Just like there is support for multiple rules per entry in an rtp table,
also support multiple actions. This makes it easier to add support for
workarounds that need to change multiple registers. It also makes it
slightly more readable as now the action part resembles the rule part.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_rtp.c')
| -rw-r--r-- | drivers/gpu/drm/xe/xe_rtp.c | 30 |
1 files changed, 17 insertions, 13 deletions
diff --git a/drivers/gpu/drm/xe/xe_rtp.c b/drivers/gpu/drm/xe/xe_rtp.c index 11135db1a19d..5b1316b588d8 100644 --- a/drivers/gpu/drm/xe/xe_rtp.c +++ b/drivers/gpu/drm/xe/xe_rtp.c @@ -86,18 +86,18 @@ static bool rule_matches(struct xe_gt *gt, return true; } -static void rtp_add_sr_entry(const struct xe_rtp_entry *entry, +static void rtp_add_sr_entry(const struct xe_rtp_action *action, struct xe_gt *gt, u32 mmio_base, struct xe_reg_sr *sr) { - u32 reg = entry->action.reg + mmio_base; + u32 reg = action->reg + mmio_base; struct xe_reg_sr_entry sr_entry = { - .clr_bits = entry->action.clr_bits, - .set_bits = entry->action.set_bits, - .read_mask = entry->action.read_mask, - .masked_reg = entry->action.flags & XE_RTP_ACTION_FLAG_MASKED_REG, - .reg_type = entry->action.reg_type, + .clr_bits = action->clr_bits, + .set_bits = action->set_bits, + .read_mask = action->read_mask, + .masked_reg = action->flags & XE_RTP_ACTION_FLAG_MASKED_REG, + .reg_type = action->reg_type, }; xe_reg_sr_add(sr, reg, &sr_entry); @@ -106,18 +106,22 @@ static void rtp_add_sr_entry(const struct xe_rtp_entry *entry, static void rtp_process_one(const struct xe_rtp_entry *entry, struct xe_gt *gt, struct xe_hw_engine *hwe, struct xe_reg_sr *sr) { + const struct xe_rtp_action *action; u32 mmio_base; + unsigned int i; if (!rule_matches(gt, hwe, entry)) return; - if ((entry->flags & XE_RTP_ENTRY_FLAG_FOREACH_ENGINE) || - (entry->action.flags & XE_RTP_ACTION_FLAG_ENGINE_BASE)) - mmio_base = hwe->mmio_base; - else - mmio_base = 0; + for (action = &entry->actions[0]; i < entry->n_actions; action++, i++) { + if ((entry->flags & XE_RTP_ENTRY_FLAG_FOREACH_ENGINE) || + (action->flags & XE_RTP_ACTION_FLAG_ENGINE_BASE)) + mmio_base = hwe->mmio_base; + else + mmio_base = 0; - rtp_add_sr_entry(entry, gt, mmio_base, sr); + rtp_add_sr_entry(action, gt, mmio_base, sr); + } } /** |