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authorJames Clark <james.clark@arm.com>2022-03-04 20:19:07 +0300
committerMathieu Poirier <mathieu.poirier@linaro.org>2022-04-13 20:05:17 +0300
commit4bc500ef252e44fd95c0402fb0b2c714a5bf94b8 (patch)
tree284c339c1a4b72c4559706773134536b32676c0b /drivers/hwtracing/coresight/coresight-etm3x-sysfs.c
parent6ba7f2bc12e8a913f6164a4caf6ce7b93e991e32 (diff)
downloadlinux-4bc500ef252e44fd95c0402fb0b2c714a5bf94b8.tar.xz
coresight: etm3x: Cleanup ETMTECR1 register accesses
This is a no-op change for style and consistency and has no effect on the binary output by the compiler. These fields already have macros to define them so use them instead of magic numbers. Signed-off-by: James Clark <james.clark@arm.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Link: https://lore.kernel.org/r/20220304171913.2292458-11-james.clark@arm.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-etm3x-sysfs.c')
-rw-r--r--drivers/hwtracing/coresight/coresight-etm3x-sysfs.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c
index e8c7649f123e..68fcbf4ce7a8 100644
--- a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c
+++ b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c
@@ -474,7 +474,7 @@ static ssize_t addr_start_store(struct device *dev,
config->addr_val[idx] = val;
config->addr_type[idx] = ETM_ADDR_TYPE_START;
config->startstop_ctrl |= (1 << idx);
- config->enable_ctrl1 |= BIT(25);
+ config->enable_ctrl1 |= ETMTECR1_START_STOP;
spin_unlock(&drvdata->spinlock);
return size;