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author | Suzuki K Poulose <suzuki.poulose@arm.com> | 2017-10-10 23:32:12 +0300 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-10-20 16:03:06 +0300 |
commit | 0bbb194c0c33c251ac3d33f46c8fd045d82350e5 (patch) | |
tree | 4bcde932e0f28bc9efbd2345eb6e82c1e5972c47 /drivers/hwtracing/coresight/coresight-stm.c | |
parent | 58f2c391cc0560231d7636c39d31b1b26c9396b7 (diff) | |
download | linux-0bbb194c0c33c251ac3d33f46c8fd045d82350e5.tar.xz |
coresight: Extend the PIDR mask to cover relevant bits in PIDR2
As per coresight standards, PIDR2 register has the following format :
[2-0] - JEP106_bits6to4
[3] - JEDEC, designer ID is specified by JEDEC.
However some of the drivers only use mask of 0x3 for the PIDR2 leaving
bits [3-2] unchecked, which could potentially match the component for
a different device altogether. This patch fixes the mask and the
corresponding id bits for the existing devices.
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-stm.c')
-rw-r--r-- | drivers/hwtracing/coresight/coresight-stm.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracing/coresight/coresight-stm.c index 92a780a6df1d..15e7ef3891f5 100644 --- a/drivers/hwtracing/coresight/coresight-stm.c +++ b/drivers/hwtracing/coresight/coresight-stm.c @@ -917,13 +917,13 @@ static const struct dev_pm_ops stm_dev_pm_ops = { static const struct amba_id stm_ids[] = { { - .id = 0x0003b962, - .mask = 0x0003ffff, + .id = 0x000bb962, + .mask = 0x000fffff, .data = "STM32", }, { - .id = 0x0003b963, - .mask = 0x0003ffff, + .id = 0x000bb963, + .mask = 0x000fffff, .data = "STM500", }, { 0, 0}, |