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authorSuzuki K Poulose <suzuki.poulose@arm.com>2017-08-02 19:22:17 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-08-28 17:05:49 +0300
commit6495892c9194001936a9ef0d30638c36f431636f (patch)
tree8b2b54d1fc86d9a8021ab3ad75eadc50eeab6325 /drivers/hwtracing/coresight/coresight-tmc.h
parentf2e931a2deab1ab426085f0357285410644f2945 (diff)
downloadlinux-6495892c9194001936a9ef0d30638c36f431636f.tar.xz
coresight tmc: Add support for Coresight SoC 600 TMC
The coresight SoC 600 supports ETR save-restore which allows us to restore a trace session by retaining the RRP/RWP/STS.Full values when the TMC leaves the Disabled state. However, the TMC doesn't have a scatter-gather unit in built. Also, TMCs have different PIDs in different configurations (ETF, ETB & ETR), unlike the previous generation. While the DEVID exposes some of the features/changes in the TMC, it doesn't explicitly advertises the new save-restore feature as described above. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-tmc.h')
-rw-r--r--drivers/hwtracing/coresight/coresight-tmc.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h
index d0da43a14246..8df7a813f537 100644
--- a/drivers/hwtracing/coresight/coresight-tmc.h
+++ b/drivers/hwtracing/coresight/coresight-tmc.h
@@ -129,6 +129,10 @@ enum tmc_mem_intf_width {
*/
#define TMC_ETR_SAVE_RESTORE (0x1U << 2)
+/* Coresight SoC-600 TMC-ETR unadvertised capabilities */
+#define CORESIGHT_SOC_600_ETR_CAPS \
+ (TMC_ETR_SAVE_RESTORE | TMC_ETR_AXI_ARCACHE)
+
/**
* struct tmc_drvdata - specifics associated to an TMC component
* @base: memory mapped base address for this component.