diff options
| author | Mathieu Poirier <mathieu.poirier@linaro.org> | 2016-05-03 20:33:50 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2016-05-04 00:59:30 +0300 |
| commit | 6c6ed1e244c0530fb76a8b52024f199f398ef100 (patch) | |
| tree | 8878b571db210fb49f02668e05b3f65062d3ccd8 /drivers/hwtracing/coresight/coresight-tmc.h | |
| parent | a8ab4268e0db93c564ee6ccb770bb3d53af24be9 (diff) | |
| download | linux-6c6ed1e244c0530fb76a8b52024f199f398ef100.tar.xz | |
coresight: tmc: splitting driver in ETB/ETF and ETR components
The TMC block can operate in 3 modes (ETB, ETF and ETR) and accessed
via two interfaces (sysFS and Perf). That makes 6 mode to cover, which
is way too much coupling for a single file.
This patch splits the original TMC driver in 2 halves, one for ETB/ETF
and another one for ETR mode. A common core is kept for functionality
common to all 3 modes.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-tmc.h')
| -rw-r--r-- | drivers/hwtracing/coresight/coresight-tmc.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h index 5a60830c8db5..b3017e115c4d 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -18,6 +18,8 @@ #ifndef _CORESIGHT_TMC_H #define _CORESIGHT_TMC_H +#include <linux/miscdevice.h> + #define TMC_RSZ 0x004 #define TMC_STS 0x00c #define TMC_RRD 0x010 @@ -118,4 +120,20 @@ struct tmc_drvdata { u32 trigger_cntr; }; +/* Generic functions */ +void tmc_wait_for_tmcready(struct tmc_drvdata *drvdata); +void tmc_flush_and_stop(struct tmc_drvdata *drvdata); +void tmc_enable_hw(struct tmc_drvdata *drvdata); +void tmc_disable_hw(struct tmc_drvdata *drvdata); + +/* ETB/ETF functions */ +void tmc_etb_enable_hw(struct tmc_drvdata *drvdata); +void tmc_etb_disable_hw(struct tmc_drvdata *drvdata); +extern const struct coresight_ops tmc_etb_cs_ops; +extern const struct coresight_ops tmc_etf_cs_ops; + +/* ETR functions */ +void tmc_etr_enable_hw(struct tmc_drvdata *drvdata); +void tmc_etr_disable_hw(struct tmc_drvdata *drvdata); +extern const struct coresight_ops tmc_etr_cs_ops; #endif |