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author | Asmaa Mnebhi <asmaa@nvidia.com> | 2022-09-08 20:35:38 +0300 |
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committer | Wolfram Sang <wsa@kernel.org> | 2022-09-17 21:11:21 +0300 |
commit | 2a5be6d1340c0fefcee8a6489cff7fd88a0d5b85 (patch) | |
tree | a81ef4d65beeee1cba035d46ddfc5c342004a4d7 /drivers/i2c | |
parent | 9d55e7b0bdf9480a57b4fe87134e749cb18e281a (diff) | |
download | linux-2a5be6d1340c0fefcee8a6489cff7fd88a0d5b85.tar.xz |
i2c: mlxbf: incorrect base address passed during io write
Correct the base address used during io write.
This bug had no impact over the overall functionality of the read and write
transactions. MLXBF_I2C_CAUSE_OR_CLEAR=0x18 so writing to (smbus->io + 0x18)
instead of (mst_cause->ioi + 0x18) actually writes to the sc_low_timeout
register which just sets the timeout value before a read/write aborts.
Fixes: b5b5b32081cd206b (i2c: mlxbf: I2C SMBus driver for Mellanox BlueField SoC)
Reviewed-by: Khalil Blaiech <kblaiech@nvidia.com>
Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Diffstat (limited to 'drivers/i2c')
-rw-r--r-- | drivers/i2c/busses/i2c-mlxbf.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/i2c/busses/i2c-mlxbf.c b/drivers/i2c/busses/i2c-mlxbf.c index 8716032f030a..612736906440 100644 --- a/drivers/i2c/busses/i2c-mlxbf.c +++ b/drivers/i2c/busses/i2c-mlxbf.c @@ -669,7 +669,7 @@ static int mlxbf_i2c_smbus_enable(struct mlxbf_i2c_priv *priv, u8 slave, /* Clear status bits. */ writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_STATUS); /* Set the cause data. */ - writel(~0x0, priv->smbus->io + MLXBF_I2C_CAUSE_OR_CLEAR); + writel(~0x0, priv->mst_cause->io + MLXBF_I2C_CAUSE_OR_CLEAR); /* Zero PEC byte. */ writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_PEC); /* Zero byte count. */ |