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authorSergey Larin <cerg2010cerg2010@mail.ru>2019-03-02 19:54:55 +0300
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2019-03-09 19:55:06 +0300
commit409a51e0a4a5f908763191fae2c29008632eb712 (patch)
tree084c49217097ed8718ee04bff5e4a67d59b077e7 /drivers/iio
parent20ea39ef9f2f911bd01c69519e7d69cfec79fde3 (diff)
downloadlinux-409a51e0a4a5f908763191fae2c29008632eb712.tar.xz
iio: gyro: mpu3050: fix chip ID reading
According to the datasheet, the last bit of CHIP_ID register controls I2C bus, and the first one is unused. Handle this correctly. Note that there are chips out there that have a value such that the id check currently fails. Signed-off-by: Sergey Larin <cerg2010cerg2010@mail.ru> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'drivers/iio')
-rw-r--r--drivers/iio/gyro/mpu3050-core.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/iio/gyro/mpu3050-core.c b/drivers/iio/gyro/mpu3050-core.c
index 77fac81a3adc..5ddebede31a6 100644
--- a/drivers/iio/gyro/mpu3050-core.c
+++ b/drivers/iio/gyro/mpu3050-core.c
@@ -29,7 +29,8 @@
#include "mpu3050.h"
-#define MPU3050_CHIP_ID 0x69
+#define MPU3050_CHIP_ID 0x68
+#define MPU3050_CHIP_ID_MASK 0x7E
/*
* Register map: anything suffixed *_H is a big-endian high byte and always
@@ -1176,8 +1177,9 @@ int mpu3050_common_probe(struct device *dev,
goto err_power_down;
}
- if (val != MPU3050_CHIP_ID) {
- dev_err(dev, "unsupported chip id %02x\n", (u8)val);
+ if ((val & MPU3050_CHIP_ID_MASK) != MPU3050_CHIP_ID) {
+ dev_err(dev, "unsupported chip id %02x\n",
+ (u8)(val & MPU3050_CHIP_ID_MASK));
ret = -ENODEV;
goto err_power_down;
}