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authorSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>2023-09-21 12:21:44 +0300
committerJoerg Roedel <jroedel@suse.de>2023-09-25 13:39:05 +0300
commit739eb25514c90aa8ea053ed4d2b971f531e63ded (patch)
treea3c4714f9728d71af64032b9515104a4c9379e1f /drivers/iommu/amd/amd_iommu_types.h
parentb0cc5dae1ac0c18748706a4beb636e3b726dd744 (diff)
downloadlinux-739eb25514c90aa8ea053ed4d2b971f531e63ded.tar.xz
iommu/amd: Introduce iommu_dev_data.ppr
For AMD IOMMU, the PPR feature is needed to support IO page fault (IOPF). PPR is enabled per PCI end-point device, and is configured by the PPR bit in the IOMMU device table entry (i.e DTE[PPR]). Introducing struct iommu_dev_data.ppr track PPR setting for each device. Also iommu_dev_data.ppr will be set only when IOMMU supports PPR. Hence remove redundant feature support check in set_dte_entry(). Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Co-developed-by: Vasant Hegde <vasant.hegde@amd.com> Signed-off-by: Vasant Hegde <vasant.hegde@amd.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com> Link: https://lore.kernel.org/r/20230921092147.5930-12-vasant.hegde@amd.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/amd/amd_iommu_types.h')
-rw-r--r--drivers/iommu/amd/amd_iommu_types.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index 1c61dca63824..87fa39c490e8 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -816,6 +816,7 @@ struct iommu_dev_data {
u8 ats_enabled :1; /* ATS state */
u8 pri_tlp :1; /* PASID TLB required for
PPR completions */
+ u8 ppr :1; /* Enable device PPR support */
bool use_vapic; /* Enable device to use vapic mode */
bool defer_attach;